From 120906dc8b0ce53ec383828b31cc16cbafb81046 Mon Sep 17 00:00:00 2001
From: Solomon Peachy <pizza@shaftnet.org>
Date: Sat, 9 Nov 2024 16:36:06 -0500
Subject: [PATCH] ata:  Ensure that the bounce buffer is minimum 32-bit aligned

Basically, if STORAGE_ALIGN_ATTR isn't defined, define it to be
sizeof(uint32_t) in the ATA code.

Change-Id: I13de61788cb71e3e8d3a956ab5f2e251471ce76d
---
 firmware/drivers/ata-common.c   | 4 ++++
 firmware/export/config/ipod6g.h | 3 ---
 firmware/export/system.h        | 5 +++++
 3 files changed, 9 insertions(+), 3 deletions(-)

diff --git a/firmware/drivers/ata-common.c b/firmware/drivers/ata-common.c
index e09abd091d..016c93967a 100644
--- a/firmware/drivers/ata-common.c
+++ b/firmware/drivers/ata-common.c
@@ -28,6 +28,10 @@
 #define __MAX_VARIABLE_LOG_SECTOR SECTOR_SIZE
 #endif
 
+#ifndef STORAGE_ALIGN_ATTR
+#define STORAGE_ALIGN_ATTR __attribute__((aligned(sizeof(uint32_t))))
+#endif
+
 struct sector_cache_entry {
     unsigned char data[MAX_PHYS_SECTOR_SIZE];
     sector_t sectornum;  /* logical sector */
diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h
index 0b508b15e3..9c024bcd7d 100644
--- a/firmware/export/config/ipod6g.h
+++ b/firmware/export/config/ipod6g.h
@@ -203,9 +203,6 @@
 /* define this if we want to support 512n and 4Kn drives */
 //#define MAX_VARIABLE_LOG_SECTOR 4096
 
-//#define STORAGE_NEEDS_BOUNCE_BUFFER
-#define STORAGE_WANTS_ALIGN
-
 #define HAVE_HARDWARE_CLICK
 
 /* Define this if you have adjustable CPU frequency */
diff --git a/firmware/export/system.h b/firmware/export/system.h
index 552540a1db..bc6a33d190 100644
--- a/firmware/export/system.h
+++ b/firmware/export/system.h
@@ -335,6 +335,11 @@ static inline void cpu_boost_unlock(void)
 #define MEM_ALIGN_DOWN(x) \
     ((typeof (x))ALIGN_DOWN((uintptr_t)(x), MEM_ALIGN_SIZE))
 
+/* Bounce buffers may have alignment requirments */
+#if defined(MAX_PHYS_SECTOR_SIZE) && !defined(STORAGE_WANTS_ALIGN)
+#define STORAGE_WANTS_ALIGN
+#endif
+
 #ifdef STORAGE_WANTS_ALIGN
     #define STORAGE_ALIGN_ATTR __attribute__((aligned(CACHEALIGN_SIZE)))
     #define STORAGE_ALIGN_DOWN(x) \