AMS SoC's: Some register bit changes need interrupt protection: timer API and CGU_PERI.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27236 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2010-07-02 06:00:00 +00:00
parent 9d6851688e
commit 0f47ffe0e4
12 changed files with 36 additions and 23 deletions

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@ -459,6 +459,7 @@ target/arm/pnx0101/timer-pnx0101.c
#endif
#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2
target/arm/bits-armv4.S
target/arm/as3525/system-as3525.c
target/arm/as3525/memory-init.S
target/arm/as3525/kernel-as3525.c

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@ -160,7 +160,7 @@ static void ascodec_finish_req(struct ascodec_request *req)
*/
while (i2c_busy());
/* disable clock */
/* disable clock - already in IRQ context */
CGU_PERI &= ~CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE;
req->status = 1;
@ -205,7 +205,7 @@ static void ascodec_start_req(struct ascodec_request *req)
int unmask = 0;
/* enable clock */
CGU_PERI |= CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
/* start transfer */
I2C2_SADDR = req->index;
@ -266,7 +266,7 @@ void ascodec_init(void)
wakeup_init(&adc_wkup);
/* enable clock */
CGU_PERI |= CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_I2C_AUDIO_MASTER_CLOCK_ENABLE);
/* prescaler for i2c clock */
prescaler = AS3525_I2C_PRESCALER;

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@ -29,7 +29,7 @@ int audio_channels = 2;
void audio_set_output_source(int source)
{
CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
if (source == AUDIO_SRC_PLAYBACK)
I2SOUT_CONTROL &= ~(1<<5);
else

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@ -33,7 +33,7 @@ void dma_retain(void)
{
if(++dma_used == 1)
{
CGU_PERI |= CGU_DMA_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_DMA_CLOCK_ENABLE);
DMAC_CONFIGURATION |= (1<<0);
}
}
@ -43,7 +43,7 @@ void dma_release(void)
if(--dma_used == 0)
{
DMAC_CONFIGURATION &= ~(1<<0);
CGU_PERI &= ~CGU_DMA_CLOCK_ENABLE;
bitclr32(&CGU_PERI, CGU_DMA_CLOCK_ENABLE);
}
if (dma_used < 0)
panicf("dma_used < 0!");

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@ -168,7 +168,7 @@ void tick_start(unsigned int interval_in_ms)
{
int cycles = KERNEL_TIMER_FREQ / 1000 * interval_in_ms;
CGU_PERI |= CGU_TIMER2_CLOCK_ENABLE; /* enable peripheral */
bitset32(&CGU_PERI, CGU_TIMER2_CLOCK_ENABLE); /* enable peripheral */
VIC_INT_ENABLE = INTERRUPT_TIMER2; /* enable interrupt */
set_timer2_cycles_per_tick(cycles);

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@ -103,7 +103,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
dma_size = size;
dma_start_addr = (unsigned char*)addr;
CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
CGU_AUDIO |= (1<<11);
dma_retain();
@ -121,7 +121,7 @@ void pcm_play_dma_stop(void)
dma_release();
CGU_PERI &= ~CGU_I2SOUT_APB_CLOCK_ENABLE;
bitclr32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
CGU_AUDIO &= ~(1<<11);
}
@ -137,7 +137,7 @@ void pcm_play_dma_pause(bool pause)
void pcm_play_dma_init(void)
{
CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_I2SOUT_APB_CLOCK_ENABLE);
I2SOUT_CONTROL = (1<<6)|(1<<3) /* enable dma, stereo */;
@ -339,7 +339,8 @@ void pcm_rec_dma_stop(void)
I2SIN_CONTROL &= ~(1<<11); /* disable dma */
CGU_AUDIO &= ~((1<<23)|(1<<11));
CGU_PERI &= ~(CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE);
bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE |
CGU_I2SOUT_APB_CLOCK_ENABLE);
}
@ -354,7 +355,8 @@ void pcm_rec_dma_start(void *addr, size_t size)
dma_retain();
CGU_PERI |= CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE |
CGU_I2SOUT_APB_CLOCK_ENABLE);
CGU_AUDIO |= ((1<<23)|(1<<11));
I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */

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@ -28,7 +28,7 @@
void lcd_hw_init(void)
{
CGU_PERI |= CGU_SSP_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE);
SSP_CPSR = AS3525_SSP_PRESCALER; /* OF = 0x10 */
SSP_CR0 = (1<<7) | (1<<6) | 7; /* Motorola SPI frame format, 8 bits */

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@ -561,9 +561,9 @@ int sd_init(void)
| (AS3525_IDE_DIV << 2)
| AS3525_CLK_PLLA; /* clock source = PLLA */
CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_NAF_CLOCK_ENABLE);
#ifdef HAVE_MULTIDRIVE
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_MCI_CLOCK_ENABLE);
CCU_IO &= ~(1<<3); /* bits 3:2 = 01, xpd is SD interface */
CCU_IO |= (1<<2);
#endif

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@ -708,7 +708,7 @@ int sd_init(void)
{
int ret;
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_MCI_CLOCK_ENABLE);
CGU_IDE = (1<<7) /* AHB interface enable */
| (AS3525_IDE_DIV << 2)
@ -974,7 +974,7 @@ void sd_enable(bool on)
{
if (on)
{
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_MCI_CLOCK_ENABLE);
CGU_IDE |= (1<<7); /* AHB interface enable */
CGU_MEMSTICK |= (1<<7); /* interface enable */
CGU_SDSLOT |= (1<<7); /* interface enable */
@ -984,7 +984,7 @@ void sd_enable(bool on)
CGU_SDSLOT &= ~(1<<7); /* interface enable */
CGU_MEMSTICK &= ~(1<<7); /* interface enable */
CGU_IDE &= ~(1<<7); /* AHB interface enable */
CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
bitclr32(&CGU_PERI, CGU_MCI_CLOCK_ENABLE);
}
}

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@ -19,7 +19,8 @@
*
****************************************************************************/
#include "as3525.h"
#include "config.h"
#include "system.h"
#include "timer.h"
#include "stdlib.h"
@ -33,6 +34,8 @@ void INT_TIMER1(void)
bool timer_set(long cycles, bool start)
{
int oldstatus = disable_irq_save();
if (start)
{
if (pfn_unregister != NULL)
@ -50,19 +53,26 @@ bool timer_set(long cycles, bool start)
TIMER_PERIODIC |
TIMER_INT_ENABLE |
TIMER_32_BIT;
restore_irq(oldstatus);
return true;
}
bool timer_start(void)
{
CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
int oldstatus = disable_irq_save();
CGU_PERI |= CGU_TIMER1_CLOCK_ENABLE; /* enable peripheral */
VIC_INT_ENABLE = INTERRUPT_TIMER1;
restore_irq(oldstatus);
return true;
}
void timer_stop(void)
{
int oldstatus = disable_irq_save();
TIMER1_CONTROL &= 0x10; /* disable timer 1 (don't modify bit 4) */
VIC_INT_EN_CLEAR = INTERRUPT_TIMER1; /* disable interrupt */
CGU_PERI &= ~CGU_TIMER1_CLOCK_ENABLE; /* disable peripheral */
restore_irq(oldstatus);
}

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@ -236,7 +236,7 @@ void usb_drv_init(void)
ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) | 1<<2);
/* AHB part */
CGU_PERI |= CGU_USB_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
/* reset AHB */
CCU_SRC = CCU_SRC_USB_AHB_EN;
@ -319,7 +319,7 @@ void usb_drv_exit(void)
USB_DEV_INTR_MASK = 0xffffffff;
VIC_INT_EN_CLEAR = INTERRUPT_USB;
CGU_USB &= ~(1<<5);
CGU_PERI &= ~CGU_USB_CLOCK_ENABLE;
bitclr32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
/* Disable UVDD generating LDO */
ascodec_write(AS3515_USB_UTIL, ascodec_read(AS3515_USB_UTIL) & ~(1<<4));
usb_disable_pll();

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@ -122,7 +122,7 @@ static void as3525v2_connect(void)
{
logf("usb-drv: init as3525v2");
/* 1) enable usb core clock */
CGU_PERI |= CGU_USB_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
usb_delay();
/* 2) enable usb phy clock */
/* PHY clock */