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AMS SoC's: Some register bit changes need interrupt protection: timer API and CGU_PERI.

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27236 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2010-07-02 06:00:00 +00:00
parent 9d6851688e
commit 0f47ffe0e4
12 changed files with 36 additions and 23 deletions
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2
firmware/target/arm/as3525/sansa-clipplus/lcd-clip-plus.c
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@ -28,7 +28,7 @@
void lcd_hw_init(void)
{
CGU_PERI |= CGU_SSP_CLOCK_ENABLE;
bitset32(&CGU_PERI, CGU_SSP_CLOCK_ENABLE);
SSP_CPSR = AS3525_SSP_PRESCALER; /* OF = 0x10 */
SSP_CR0 = (1<<7) | (1<<6) | 7; /* Motorola SPI frame format, 8 bits */