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Introduce S5L8701 CONFIG_CPU definition for Nano2G and a new CPU_S5L870X "family" define - the 8700 and 8701 are proving to be different. Also move all the cpu-specific defines earlier in config.h
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21886 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Dave Chapman
parent
0a2197b846
commit
0d484bad5e
4 changed files with 71 additions and 62 deletions
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@ -425,7 +425,7 @@ target/arm/tcc77x/crt0.S
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target/arm/tcc780x/crt0.S
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#elif CONFIG_CPU==IMX31L
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target/arm/imx31/crt0.S
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#elif CONFIG_CPU==S5L8700
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#elif defined(CPU_S5L870X)
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target/arm/s5l8700/crt0.S
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#elif defined(CPU_ARM)
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target/arm/crt0.S
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@ -1256,7 +1256,7 @@ target/arm/tcc780x/cowond2/audio-cowond2.c
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#endif /* SIMULATOR */
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#endif /* COWON_D2 */
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#if CONFIG_CPU==S5L8700
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#ifdef CPU_S5L870X
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target/arm/s5l8700/system-s5l8700.c
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#endif
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@ -1292,6 +1292,7 @@ target/arm/s5l8700/udacodec-meizu.c
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#endif /* MEIZU_M3 */
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#ifdef IPOD_NANO2G
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target/arm/s5l8700/kernel-s5l8700.c
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target/arm/s5l8700/ipodnano2g/lcd-nano2g.c
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#endif
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@ -125,7 +125,7 @@
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//#define HAVE_LCD_CONTRAST
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/* Define this if you have a Motorola SCF5250 */
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#define CONFIG_CPU S5L8700
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#define CONFIG_CPU S5L8701
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/* Define this if you want to use coldfire's i2c interface */
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#define CONFIG_I2C I2C_S5L8700
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@ -68,6 +68,7 @@
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#define TCC773L 773
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#define TCC7801 7801
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#define S5L8700 8700
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#define S5L8701 8701
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#define JZ4732 4732
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#define AS3525 3525
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#define AT91SAM9260 9260
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@ -387,6 +388,69 @@ Lyre prototype 1*/
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/* setup basic macros from capability masks */
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#include "config_caps.h"
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/* setup CPU-specific defines */
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/* define for all cpus from SH family */
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#if (CONFIG_CPU == SH7034)
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#define CPU_SH
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#endif
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/* define for all cpus from coldfire family */
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#if (CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250)
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#define CPU_COLDFIRE
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#endif
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/* define for all cpus from PP family */
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#if (CONFIG_CPU == PP5002)
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#define CPU_PP
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#elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022) \
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|| (CONFIG_CPU == PP5024) || (CONFIG_CPU == PP6100)
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#define CPU_PP
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#define CPU_PP502x
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#endif
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/* define for all cpus from S5L870X family */
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#if (CONFIG_CPU == S5L8700) || (CONFIG_CPU == S5L8701)
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#define CPU_S5L870X
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#endif
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/* define for all cpus from TCC77X family */
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#if (CONFIG_CPU == TCC771L) || (CONFIG_CPU == TCC773L) || (CONFIG_CPU == TCC770)
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#define CPU_TCC77X
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#endif
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/* define for all cpus from TCC780 family */
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#if (CONFIG_CPU == TCC7801)
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#define CPU_TCC780X
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#endif
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/* define for all cpus from ARM7TDMI family (for specific optimisations) */
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#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25)
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#define CPU_ARM7TDMI
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#endif
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/* define for all cpus from ARM family */
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#if (CONFIG_CPU == IMX31L)
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#define CPU_ARM
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#define ARM_ARCH 6 /* ARMv6 */
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#endif
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#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320) \
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|| (CONFIG_CPU == AT91SAM9260)
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#define CPU_ARM
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#define ARM_ARCH 5 /* ARMv5 */
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#endif
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#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \
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|| (CONFIG_CPU == DSC25) || defined(CPU_S5L870X) || (CONFIG_CPU == AS3525)
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#define CPU_ARM
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#define ARM_ARCH 4 /* ARMv4 */
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#endif
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#if (CONFIG_CPU == JZ4732)
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#define CPU_MIPS 32
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#endif
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/* now set any CONFIG_ defines correctly if they are not used,
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No need to do this on CONFIG_'s which are compulsory (e.g CONFIG_CODEC ) */
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@ -561,68 +625,12 @@ Lyre prototype 1*/
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#if defined(HAVE_USBSTACK) || (CONFIG_CPU == JZ4732) \
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|| (CONFIG_CPU == AS3525) || (CONFIG_CPU == S3C2440) \
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|| (CONFIG_CPU == S5L8700)
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|| defined(CPU_S5L870X)
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#define HAVE_WAKEUP_OBJECTS
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#endif
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#endif /* (CONFIG_CODEC == SWCODEC) */
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/* define for all cpus from SH family */
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#if (CONFIG_CPU == SH7034)
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#define CPU_SH
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#endif
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/* define for all cpus from coldfire family */
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#if (CONFIG_CPU == MCF5249) || (CONFIG_CPU == MCF5250)
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#define CPU_COLDFIRE
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#endif
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/* define for all cpus from PP family */
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#if (CONFIG_CPU == PP5002)
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#define CPU_PP
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#elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022) \
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|| (CONFIG_CPU == PP5024) || (CONFIG_CPU == PP6100)
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#define CPU_PP
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#define CPU_PP502x
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#endif
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/* define for all cpus from TCC77X family */
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#if (CONFIG_CPU == TCC771L) || (CONFIG_CPU == TCC773L) || (CONFIG_CPU == TCC770)
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#define CPU_TCC77X
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#endif
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/* define for all cpus from TCC780 family */
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#if (CONFIG_CPU == TCC7801)
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#define CPU_TCC780X
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#endif
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/* define for all cpus from ARM7TDMI family (for specific optimisations) */
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#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == DSC25)
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#define CPU_ARM7TDMI
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#endif
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/* define for all cpus from ARM family */
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#if (CONFIG_CPU == IMX31L)
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#define CPU_ARM
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#define ARM_ARCH 6 /* ARMv6 */
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#endif
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#if defined(CPU_TCC77X) || defined(CPU_TCC780X) || (CONFIG_CPU == DM320) \
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|| (CONFIG_CPU == AT91SAM9260)
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#define CPU_ARM
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#define ARM_ARCH 5 /* ARMv5 */
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#endif
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#if defined(CPU_PP) || (CONFIG_CPU == PNX0101) || (CONFIG_CPU == S3C2440) \
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|| (CONFIG_CPU == DSC25) || (CONFIG_CPU == S5L8700) || (CONFIG_CPU == AS3525)
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#define CPU_ARM
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#define ARM_ARCH 4 /* ARMv4 */
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#endif
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#if (CONFIG_CPU == JZ4732)
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#define CPU_MIPS 32
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#endif
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/* Determine if accesses should be strictly long aligned. */
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#if (CONFIG_CPU == SH7034) || defined(CPU_ARM) || defined(CPU_MIPS)
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#define ROCKBOX_STRICT_ALIGN 1
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@ -648,7 +656,7 @@ Lyre prototype 1*/
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(CONFIG_CPU == AS3525 && MEMORYSIZE > 2) || /* AS3525 +2MB: core, plugins, codecs */ \
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(CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB:core only */ \
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(CONFIG_CPU == PNX0101) || \
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(CONFIG_CPU == S5L8700)) /* Samsung S5L8700: core, plugins, codecs */ || \
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defined(CPU_S5L870X)) || /* Samsung S5L8700: core, plugins, codecs */ \
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(CONFIG_CPU == JZ4732 && !defined(PLUGIN) && !defined(CODEC)) /* Jz4740: core only */
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#define ICODE_ATTR __attribute__ ((section(".icode")))
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#define ICONST_ATTR __attribute__ ((section(".irodata")))
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@ -59,7 +59,7 @@
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#ifdef CPU_TCC780X
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#include "tcc780x.h"
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#endif
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#if CONFIG_CPU == S5L8700
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#ifdef CPU_S5L870X
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#include "s5l8700.h"
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#endif
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#if CONFIG_CPU == JZ4732
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