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mips: Heavily rework DMA & caching code

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Based on code originally written by Amaury Pouly (g#1789, g#1791, g#1527)
but rebased and heavily updated.

Change-Id: Ic794abb5e8d89feb4b88fc3abe854270fb28db70
This commit is contained in:
Solomon Peachy 2020-08-28 21:45:58 -04:00
parent 1ae8213a64
commit 0cb162a76b
16 changed files with 188 additions and 129 deletions
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4
firmware/target/mips/ingenic_jz47xx/ata-nand-jz4740.c
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@ -151,7 +151,7 @@ static void jz_nand_write_dma(void *source, unsigned int len, int bw)
mutex_lock(&nand_dma_mtx);
if(((unsigned int)source < 0xa0000000) && len)
dma_cache_wback_inv((unsigned long)source, len);
commit_discard_dcache_range(source, len);
dma_enable();
@ -184,7 +184,7 @@ static void jz_nand_read_dma(void *target, unsigned int len, int bw)
mutex_lock(&nand_dma_mtx);
if(((unsigned int)target < 0xa0000000) && len)
dma_cache_wback_inv((unsigned long)target, len);
discard_dcache_range(target, len);
dma_enable();