mirror of
https://github.com/Rockbox/rockbox.git
synced 2026-07-10 13:29:52 -04:00
x1000: add basic UART implementation
Change-Id: Ic5a6d66b7280b924e6a106f07849a057c72d5c4c
This commit is contained in:
Skye
parent
a019f19b1c
commit
0c8365a286
3 changed files with 290 additions and 0 deletions
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@ -1754,6 +1754,7 @@ target/mips/ingenic_x1000/pwm-x1000.c
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target/mips/ingenic_x1000/sfc-x1000.c
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target/mips/ingenic_x1000/system-x1000.c
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target/mips/ingenic_x1000/timer-x1000.c
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target/mips/ingenic_x1000/uart-x1000.c
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#ifndef USB_NONE
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target/mips/ingenic_x1000/usb-x1000.c
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#endif
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246
firmware/target/mips/ingenic_x1000/uart-x1000.c
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246
firmware/target/mips/ingenic_x1000/uart-x1000.c
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@ -0,0 +1,246 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2026 Skye Green
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "gpio-x1000.h"
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#include "irq-x1000.h"
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#include "kernel.h"
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#include "panic.h"
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#include "semaphore.h"
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#include "system.h"
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#include "uart-x1000.h"
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#include "thread.h"
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#include "x1000/macro.h"
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#include "x1000/uart.h"
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#include "x1000/cpm.h"
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#include <assert.h>
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const uint8_t *tx_buf[PORT_MAX];
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size_t tx_available[PORT_MAX];
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struct semaphore tx_done_sem[PORT_MAX];
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uint8_t *rx_buf[PORT_MAX];
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size_t rx_available[PORT_MAX];
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struct semaphore rx_done_sem[PORT_MAX];
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void uart_init(uart_port_t port, int baud) {
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switch (port) {
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case PORT_UART0:
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jz_writef(CPM_CLKGR, UART0(0));
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system_enable_irq(IRQ_UART0);
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break;
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case PORT_UART1:
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jz_writef(CPM_CLKGR, UART1(0));
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system_enable_irq(IRQ_UART1);
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break;
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case PORT_UART2:
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jz_writef(CPM_CLKGR, UART2(0));
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system_enable_irq(IRQ_UART2);
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break;
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default:
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panicf("invalid UART port %d", port);
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}
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tx_available[port] = 0;
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rx_available[port] = 0;
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semaphore_init(&tx_done_sem[port], 1, 0);
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semaphore_init(&rx_done_sem[port], 1, 0);
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jz_write(UART_ULCR(port), 0);
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jz_write(UART_UIER(port), 0);
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jz_overwritef(UART_ULCR(port), WLS(0b11));
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uart_set_baud(port, baud);
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jz_overwritef(UART_UMCR(port), MDCE(1), FCM(1));
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jz_overwritef(UART_UFCR(port), RDTR(0b11), UME(1), TFRT(1), RFRT(1), FME(1));
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}
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void uart_deinit(uart_port_t port) {
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jz_write(UART_ULCR(port), 0);
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jz_write(UART_UIER(port), 0);
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jz_writef(UART_UFCR(port), UME(0));
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if (tx_available[port] > 0) {
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semaphore_release(&tx_done_sem[port]);
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}
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if (rx_available[port] > 0) {
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semaphore_release(&rx_done_sem[port]);
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}
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switch (port) {
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case PORT_UART0:
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system_disable_irq(IRQ_UART0);
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jz_writef(CPM_CLKGR, UART0(1));
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break;
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case PORT_UART1:
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system_disable_irq(IRQ_UART1);
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jz_writef(CPM_CLKGR, UART1(1));
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break;
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case PORT_UART2:
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system_disable_irq(IRQ_UART2);
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jz_writef(CPM_CLKGR, UART2(1));
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break;
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default:
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panicf("invalid UART port %d", port);
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}
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}
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void uart_set_baud(uart_port_t port, int baud) {
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uint32_t udllr, udlhr, umr, uacr;
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switch (baud) {
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#if X1000_EXCLK_FREQ == 24000000
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case 115200:
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udllr = 13;
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udlhr = 0;
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umr = 16;
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uacr = 0;
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break;
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case 1500000:
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udllr = 1;
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udlhr = 0;
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umr = 16;
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uacr = 0;
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break;
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case 2000000:
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udllr = 1;
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udlhr = 0;
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umr = 12;
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uacr = 0;
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break;
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case 3000000:
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udllr = 1;
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udlhr = 0;
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umr = 8;
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uacr = 0;
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break;
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case 4000000:
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udllr = 1;
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udlhr = 0;
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umr = 6;
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uacr = 0;
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break;
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#endif
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default:
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panicf("UART(%d): unsupported baud %d", port, baud);
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}
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jz_writef(UART_ULCR(port), DLAB(1));
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jz_write(UART_UDLLR(port), udllr);
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jz_write(UART_UDLHR(port), udlhr);
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jz_writef(UART_ULCR(port), DLAB(0));
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jz_write(UART_UMR(port), umr);
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jz_write(UART_UACR(port), uacr);
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}
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void uart_refill_tx(uart_port_t port) {
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for (int i = 0; i < 32 && tx_available[port] > 0; i++) {
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uint8_t byte = *tx_buf[port];
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jz_write(UART_UTHR(port), byte);
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tx_available[port]--;
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tx_buf[port]++;
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}
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}
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void uart_empty_rx(uart_port_t port) {
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int slots = jz_read(UART_URCR(port));
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while (slots > 0 && rx_available[port] > 0) {
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*rx_buf[port] = jz_read(UART_URBR(port));
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rx_available[port]--;
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rx_buf[port]++;
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slots--;
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}
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}
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void uart_tx(uart_port_t port, const uint8_t *buf, size_t len) {
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assert(buf != NULL);
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assert(len > 0);
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tx_buf[port] = buf;
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tx_available[port] = len;
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jz_writef(UART_UIER(port), TDRIE(1));
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semaphore_wait(&tx_done_sem[port], TIMEOUT_BLOCK);
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while (jz_readf(UART_ULSR(port), TEMP) == 0) {
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yield();
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}
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}
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size_t uart_rx(uart_port_t port, uint8_t *buf, size_t len) {
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rx_buf[port] = buf;
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rx_available[port] = len;
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jz_writef(UART_UIER(port), RTOIE(1), RDRIE(1));
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semaphore_wait(&rx_done_sem[port], TIMEOUT_BLOCK);
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size_t rem = rx_available[port];
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rx_available[port] = 0;
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return len - rem;
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}
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bool uart_pending_rx(uart_port_t port) {
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return jz_read(UART_URCR(port)) > 0;
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}
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void uart_irq(uart_port_t port) {
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uint32_t uiir = jz_read(UART_UIIR(port));
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if (jz_vreadf(uiir, UART_UIIR, INPEND) != 0) {
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return;
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}
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uint32_t ulsr = jz_read(UART_ULSR(port));
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if (jz_vreadf(ulsr, UART_ULSR, TDRQ) != 0) {
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uart_refill_tx(port);
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if (tx_available[port] == 0) {
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jz_writef(UART_UIER(port), TDRIE(0));
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semaphore_release(&tx_done_sem[port]);
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}
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}
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if (jz_vreadf(ulsr, UART_ULSR, DRY) != 0) {
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bool was_avail = rx_available[port] > 0;
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uart_empty_rx(port);
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if (was_avail && rx_available[port] == 0) {
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jz_writef(UART_UIER(port), RDRIE(0), RLSIE(0), RTOIE(0));
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semaphore_release(&rx_done_sem[port]);
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return;
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}
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}
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if (jz_vreadf(uiir, UART_UIIR, INID) == 0b110) {
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jz_writef(UART_UIER(port), RDRIE(0), RLSIE(0), RTOIE(0));
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semaphore_release(&rx_done_sem[port]);
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}
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}
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void UART0(void)
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{
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uart_irq(PORT_UART0);
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}
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void UART1(void)
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{
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uart_irq(PORT_UART1);
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}
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void UART2(void)
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{
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uart_irq(PORT_UART2);
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}
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43
firmware/target/mips/ingenic_x1000/uart-x1000.h
Normal file
43
firmware/target/mips/ingenic_x1000/uart-x1000.h
Normal file
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@ -0,0 +1,43 @@
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/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2026 Skye Green
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __UART_X1000_H__
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#define __UART_X1000_H__
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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typedef enum {
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PORT_UART0 = 0,
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PORT_UART1 = 1,
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PORT_UART2 = 2,
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PORT_MAX = 3,
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} uart_port_t;
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extern void uart_init(uart_port_t port, int baud);
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extern void uart_tx(uart_port_t port, const uint8_t *buf, size_t len);
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extern size_t uart_rx(uart_port_t port, uint8_t *buf, size_t len);
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extern bool uart_pending_rx(uart_port_t port);
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extern void uart_set_baud(uart_port_t port, int baud);
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extern void uart_deinit(uart_port_t port);
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#endif /* __UART_X1000_H__ */
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