mirror of
https://github.com/Rockbox/rockbox.git
synced 2025-11-09 21:22:39 -05:00
imx233: add audioin init code, add adc dma interrupts, fix register defines
Change-Id: I204afbd3390f8dcde6ea1315ea6aa8dde12d3749
This commit is contained in:
parent
cd89b31133
commit
0aca81d807
5 changed files with 27 additions and 5 deletions
|
|
@ -18,10 +18,16 @@
|
|||
* KIND, either express or implied.
|
||||
*
|
||||
****************************************************************************/
|
||||
#include "audioout-imx233.h"
|
||||
#include "audioin-imx233.h"
|
||||
|
||||
void imx233_audioin_preinit(void)
|
||||
{
|
||||
/* Enable AUDIOIN block */
|
||||
imx233_reset_block(&HW_AUDIOIN_CTRL);
|
||||
/* Enable ADC */
|
||||
__REG_CLR(HW_AUDIOIN_ANACLKCTRL) = HW_AUDIOIN_ANACLKCTRL__CLKGATE;
|
||||
/* Set word-length to 16-bit */
|
||||
__REG_SET(HW_AUDIOIN_CTRL) = HW_AUDIOIN_CTRL__WORD_LENGTH;
|
||||
}
|
||||
|
||||
void imx233_audioin_postinit(void)
|
||||
|
|
@ -30,4 +36,9 @@ void imx233_audioin_postinit(void)
|
|||
|
||||
void imx233_audioin_close(void)
|
||||
{
|
||||
/* TODO mute */
|
||||
/* Gate off ADC */
|
||||
__REG_SET(HW_AUDIOIN_ANACLKCTRL) = HW_AUDIOIN_ANACLKCTRL__CLKGATE;
|
||||
/* will also gate off the module */
|
||||
__REG_CLR(HW_AUDIOIN_CTRL) = HW_AUDIOIN_CTRL__RUN;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -23,6 +23,7 @@
|
|||
|
||||
#include "config.h"
|
||||
#include "cpu.h"
|
||||
#include "system.h"
|
||||
|
||||
#define HW_AUDIOIN_BASE 0x8004c000
|
||||
|
||||
|
|
@ -69,7 +70,7 @@
|
|||
#define HW_AUDIOIN_ADCDEBUG (*(volatile uint32_t *)(HW_AUDIOIN_BASE + 0x40))
|
||||
#define HW_AUDIOIN_ADCDEBUG__FIFO_STATUS 1
|
||||
|
||||
#define HW_AUDIOIN_ADCVOL (*(volatile uint32_t *)(HW_AUDIOOUT_BASE + 0x50))
|
||||
#define HW_AUDIOIN_ADCVOL (*(volatile uint32_t *)(HW_AUDIOIN_BASE + 0x50))
|
||||
#define HW_AUDIOIN_ADCVOL__GAIN_RIGHT_BP 0
|
||||
#define HW_AUDIOIN_ADCVOL__GAIN_RIGHT_BM (0xf << 0)
|
||||
#define HW_AUDIOIN_ADCVOL__SELECT_RIGHT_BP 4
|
||||
|
|
@ -82,7 +83,7 @@
|
|||
#define HW_AUDIOIN_ADCVOL__EN_ADC_ZCD (1 << 25)
|
||||
#define HW_AUDIOIN_ADCVOL__VOLUME_UPDATE_PENDING (1 << 28)
|
||||
|
||||
#define HW_AUDIOIN_MICLINE (*(volatile uint32_t *)(HW_AUDIOOUT_BASE + 0x60))
|
||||
#define HW_AUDIOIN_MICLINE (*(volatile uint32_t *)(HW_AUDIOIN_BASE + 0x60))
|
||||
#define HW_AUDIOIN_MICLINE__MIC_GAIN_BP 0
|
||||
#define HW_AUDIOIN_MICLINE__MIC_GAIN_BM 0x3
|
||||
#define HW_AUDIOIN_MICLINE__MIC_CHOPCLK_BP 4
|
||||
|
|
@ -95,7 +96,7 @@
|
|||
#define HW_AUDIOIN_MICLINE__DIVIDE_LINE2 (1 << 28)
|
||||
#define HW_AUDIOIN_MICLINE__DIVIDE_LINE1 (1 << 29)
|
||||
|
||||
#define HW_AUDIOIN_ANACLKCTRL (*(volatile uint32_t *)(HW_AUDIOOUT_BASE + 0x70))
|
||||
#define HW_AUDIOIN_ANACLKCTRL (*(volatile uint32_t *)(HW_AUDIOIN_BASE + 0x70))
|
||||
#define HW_AUDIOIN_ANACLKCTRL__ADCDIV_BP 0
|
||||
#define HW_AUDIOIN_ANACLKCTRL__ADCDIV_BM (0x7 << 0)
|
||||
#define HW_AUDIOIN_ANACLKCTRL__ADCCLK_SHIFT_BP 4
|
||||
|
|
@ -105,7 +106,7 @@
|
|||
#define HW_AUDIOIN_ANACLKCTRL__DITHER_OFF (1 << 10)
|
||||
#define HW_AUDIOIN_ANACLKCTRL__CLKGATE (1 << 31)
|
||||
|
||||
#define HW_AUDIOIN_DATA (*(volatile uint32_t *)(HW_AUDIOOUT_BASE + 0x80))
|
||||
#define HW_AUDIOIN_DATA (*(volatile uint32_t *)(HW_AUDIOIN_BASE + 0x80))
|
||||
|
||||
void imx233_audioin_preinit(void);
|
||||
void imx233_audioin_postinit(void);
|
||||
|
|
|
|||
|
|
@ -131,6 +131,10 @@ const void *pcm_play_dma_get_peak_buffer(int *count)
|
|||
return (void *)info.bar;
|
||||
}
|
||||
|
||||
/*
|
||||
* Recording
|
||||
*/
|
||||
|
||||
void pcm_rec_lock(void)
|
||||
{
|
||||
}
|
||||
|
|
|
|||
|
|
@ -69,6 +69,8 @@ default_interrupt(INT_LRADC_CH6);
|
|||
default_interrupt(INT_LRADC_CH7);
|
||||
default_interrupt(INT_DAC_DMA);
|
||||
default_interrupt(INT_DAC_ERROR);
|
||||
default_interrupt(INT_ADC_DMA);
|
||||
default_interrupt(INT_ADC_ERROR);
|
||||
default_interrupt(INT_DCP);
|
||||
|
||||
typedef void (*isr_t)(void);
|
||||
|
|
@ -102,6 +104,8 @@ static isr_t isr_table[INT_SRC_NR_SOURCES] =
|
|||
[INT_SRC_LRADC_CHx(7)] = INT_LRADC_CH7,
|
||||
[INT_SRC_DAC_DMA] = INT_DAC_DMA,
|
||||
[INT_SRC_DAC_ERROR] = INT_DAC_ERROR,
|
||||
[INT_SRC_ADC_DMA] = INT_ADC_DMA,
|
||||
[INT_SRC_ADC_ERROR] = INT_ADC_ERROR,
|
||||
[INT_SRC_DCP] = INT_DCP,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -66,6 +66,8 @@
|
|||
#define INT_SRC_VDD5V 3
|
||||
#define INT_SRC_DAC_DMA 5
|
||||
#define INT_SRC_DAC_ERROR 6
|
||||
#define INT_SRC_ADC_DMA 7
|
||||
#define INT_SRC_ADC_ERROR 8
|
||||
#define INT_SRC_USB_CTRL 11
|
||||
#define INT_SRC_SSP1_DMA 14
|
||||
#define INT_SRC_SSP1_ERROR 15
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue