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imx233: enable underflow recovery in lcdif (needed for freq scale)

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When chaging the cpu and memory frequency we need to disable the
external memory interface (EMI) for a small time. This can
underflow the dma and cause some breakage. Hopefully the SSP
controller handles this gracefully by stopping the clock and the
I2C probably handles this naturally because the clock can be
streched anyway. However the LCDIF has a special setting for this
which needs to be enable, otherwise it will send garbage to the
LCD. No other block is known to suffer from this currently but
this issue might have more unexpected consequences.

Change-Id: Ide154cad87929f2bf6cc419ac1d2ff33e30eec66
This commit is contained in:
Amaury Pouly 2013-01-12 18:58:19 +00:00
parent 2ef7a549d5
commit 0946a1e0f2
5 changed files with 13 additions and 0 deletions
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1
firmware/target/arm/imx233/creative-zenxfi2/lcd-zenxfi2.c
View file

@ -40,6 +40,7 @@ static void setup_parameters(void)
imx233_lcdif_set_lcd_databus_width(HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_18_BIT);
imx233_lcdif_set_word_length(HW_LCDIF_CTRL__WORD_LENGTH_18_BIT);
imx233_lcdif_set_timings(2, 2, 3, 3);
imx233_lcdif_enable_underflow_recover(true);
}
static void setup_lcd_pins(bool use_lcdif)

1
firmware/target/arm/imx233/creative-zenxfi3/lcd-zenxfi3.c
View file

@ -40,6 +40,7 @@ static void setup_parameters(void)
imx233_lcdif_set_lcd_databus_width(HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_16_BIT);
imx233_lcdif_set_word_length(HW_LCDIF_CTRL__WORD_LENGTH_16_BIT);
imx233_lcdif_set_timings(2, 2, 3, 3);
imx233_lcdif_enable_underflow_recover(true);
}
static void setup_lcd_pins(bool use_lcdif)

8
firmware/target/arm/imx233/lcdif-imx233.c
View file

@ -23,6 +23,14 @@
static unsigned lcdif_word_length = 0;
static unsigned lcdif_byte_packing = 0;
void imx233_lcdif_enable_underflow_recover(bool enable)
{
if(enable)
__REG_SET(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RECOVER_ON_UNDERFLOW;
else
__REG_CLR(HW_LCDIF_CTRL1) = HW_LCDIF_CTRL1__RECOVER_ON_UNDERFLOW;
}
void imx233_lcdif_enable_bus_master(bool enable)
{
if(enable)

2
firmware/target/arm/imx233/lcdif-imx233.h
View file

@ -53,6 +53,7 @@
#define HW_LCDIF_CTRL1__IRQ_BP 8
#define HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BM (0xf << 16)
#define HW_LCDIF_CTRL1__BYTE_PACKING_FORMAT_BP 16
#define HW_LCDIF_CTRL1__RECOVER_ON_UNDERFLOW (1 << 24)
#define HW_LCDIF__VSYNC_EDGE_IRQ 1
#define HW_LCDIF__CUR_FRAME_DONE_IRQ 2
@ -84,6 +85,7 @@
#define HW_LCDIF_STAT__TXFIFO_EMPTY (1 << 26)
#define HW_LCDIF_STAT__BUSY (1 << 25)
void imx233_lcdif_enable_underflow_recover(bool enable);
void imx233_lcdif_enable_bus_master(bool enable);
void imx233_lcdif_enable(bool enable);
void imx233_lcdif_reset(void);// reset lcdif block

1
firmware/target/arm/imx233/sansa-fuzeplus/lcd-fuzeplus.c
View file

@ -54,6 +54,7 @@ static void setup_parameters(void)
imx233_lcdif_set_lcd_databus_width(HW_LCDIF_CTRL__LCD_DATABUS_WIDTH_18_BIT);
imx233_lcdif_set_word_length(HW_LCDIF_CTRL__WORD_LENGTH_18_BIT);
imx233_lcdif_set_timings(1, 2, 2, 2);
imx233_lcdif_enable_underflow_recover(true);
}
static void setup_lcd_pins(bool use_lcdif)