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Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).

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git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16981 a1c6a512-1295-4272-9138-f99709370657
This commit is contained in:
Michael Sevakis 2008-04-06 04:34:57 +00:00
parent be698f086d
commit 05099149f1
40 changed files with 323 additions and 126 deletions
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4
firmware/kernel.c
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@ -49,7 +49,7 @@
#endif
#if !defined(CPU_PP) || !defined(BOOTLOADER)
volatile long current_tick NOCACHEDATA_ATTR = 0;
volatile long current_tick SHAREDDATA_ATTR = 0;
#endif
void (*tick_funcs[MAX_NUM_TICK_TASKS])(void);
@ -62,7 +62,7 @@ static struct
int count;
struct event_queue *queues[MAX_NUM_QUEUES];
IF_COP( struct corelock cl; )
} all_queues NOCACHEBSS_ATTR;
} all_queues SHAREDBSS_ATTR;
/****************************************************************************
* Standard kernel stuff