pylibfdt: Add add_mem_rsv() and del_mem_rsv()

The memory reserve map can be read through num_mem_rsv() and
get_mem_rsv(), but changing it requires calling the raw fdt_* wrappers
with the private Fdt._fdt buffer, as the class exposes no methods for
the write side.

Add them next to the existing accessors, and test them.

Signed-off-by: Alexey Charkov <alchark@flipper.net>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Alexey Charkov 2026-08-06 13:19:02 +04:00 • committed by David Gibson
parent 3750493c8b
commit 89c99ce78a
2 changed files with 50 additions and 0 deletions

View file

@ -636,6 +636,42 @@ class Fdt(FdtRo):
del self._fdt[self.totalsize():]
return err
def add_mem_rsv(self, addr, size, quiet=()):
"""Add a memory reserve-map record
This asks the client program not to use the given region of memory,
e.g. because something was loaded there.
Args:
addr: Start address of the region to reserve
size: Size of the region to reserve, in bytes
quiet: Errors to ignore (empty to raise on all errors)
Returns:
Error code, or 0 if OK
Raises:
FdtException if there is no space for another record, or another
error occurs
"""
return check_err(fdt_add_mem_rsv(self._fdt, addr, size), quiet)
def del_mem_rsv(self, index, quiet=()):
"""Remove the indexed memory reserve-map record
Args:
index: Record to remove (0=first)
quiet: Errors to ignore (empty to raise on all errors)
Returns:
Error code, or 0 if OK
Raises:
FdtException if there is no record at @index, or another error
occurs
"""
return check_err(fdt_del_mem_rsv(self._fdt, index), quiet)
def set_name(self, nodeoffset, name, quiet=()):
"""Set the name of a node

View file

@ -411,6 +411,20 @@ class PyLibfdtBasicTests(unittest.TestCase):
self.fdt.get_mem_rsv(0))
self.assertEqual([123456789, 0o10000], self.fdt.get_mem_rsv(1))
def testAddDelReserveMap(self):
"""Test that we can add to and remove from the memory reserve map"""
fdt = _ReadFdt('test_tree1.dtb')
fdt.resize(fdt.totalsize() + 64)
self.assertEqual(0, fdt.add_mem_rsv(0x40000000, 0x2000))
self.assertEqual(3, fdt.num_mem_rsv())
self.assertEqual([0x40000000, 0x2000], fdt.get_mem_rsv(2))
self.assertEqual(0, fdt.del_mem_rsv(2))
self.assertEqual(2, fdt.num_mem_rsv())
self.assertEqual(-libfdt.NOTFOUND,
fdt.del_mem_rsv(2, QUIET_NOTFOUND))
def testCells(self):
"""Test that we can read #address-cells and #size-cells"""
self.assertEqual(1, self.fdt.address_cells(0))