mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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230 lines
8.4 KiB
C
230 lines
8.4 KiB
C
/**************************************************************************//**
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* @file
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* @brief SPI implementation of Board Control interface
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* This implementation use the USART2 SPI interface to control board
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* control registers. It works
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* @author Energy Micro AS
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* @version 1.0.1
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******************************************************************************
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* @section License
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* <b>(C) Copyright 2009 Energy Micro AS, http://www.energymicro.com</b>
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******************************************************************************
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*
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* This source code is the property of Energy Micro AS. The source and compiled
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* code may only be used on Energy Micro "EFM32" microcontrollers.
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*
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* This copyright notice may not be removed from the source code nor changed.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
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* obligation to support this Software. Energy Micro AS is providing the
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* Software "AS IS", with no express or implied warranties of any kind,
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* including, but not limited to, any implied warranties of merchantability
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* or fitness for any particular purpose or warranties against infringement
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* of any proprietary rights of a third party.
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*
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* Energy Micro AS will not be liable for any consequential, incidental, or
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* special damages, or any other relief, or for any claim by any third party,
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* arising from your use of this Software.
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*
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*****************************************************************************/
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#include "efm32.h"
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#include "dvk.h"
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#include "dvk_bcregisters.h"
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#define clear_bit(reg, bit) (reg &= ~(1 << bit))
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static volatile uint16_t *lastAddr = 0;
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/**************************************************************************//**
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* @brief Initializes USART2 SPI interface for access to FPGA registers
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* for board control
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*****************************************************************************/
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static void spiInit(void)
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{
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USART_TypeDef *usart = USART2;
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GPIO_TypeDef *gpio = GPIO;
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uint32_t clk, spidiv;
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const uint32_t baudrate = 7000000;
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const uint32_t div = (2 * baudrate / 256);
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/* Configure SPI bus connect pins */
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gpio->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE13_MASK);
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gpio->P[2].MODEH |= (GPIO_P_MODEH_MODE13_PUSHPULL);
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gpio->P[2].DOUT &= ~(1UL << 13);
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/* Configure SPI pins */
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gpio->P[2].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK |
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_GPIO_P_MODEL_MODE3_MASK |
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_GPIO_P_MODEL_MODE4_MASK |
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_GPIO_P_MODEL_MODE5_MASK);
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gpio->P[2].MODEL |= (GPIO_P_MODEL_MODE2_PUSHPULL |
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GPIO_P_MODEL_MODE3_PUSHPULL |
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GPIO_P_MODEL_MODE4_PUSHPULL |
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GPIO_P_MODEL_MODE5_PUSHPULL);
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gpio->P[2].DOUT |= (1UL << 5);
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/* Configure USART2 as SPI master with manual CS */
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/* Get peripheral clock - ensure updated SystemCoreClock */
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SystemCoreClockUpdate();
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clk = (SystemCoreClock >> ((CMU->HFPERCLKDIV & _CMU_HFPERCLKDIV_HFPERCLKDIV_MASK) >>
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_CMU_HFPERCLKDIV_HFPERCLKDIV_SHIFT));
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/* Drive spi at max 7Mhz or half clockrate if core freq < 14Mhz */
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if (clk < 14000000)
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{
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spidiv = 0;
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}
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else
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{
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spidiv = (clk) / (div) - 256;
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}
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/* Never allow higher frequency than specified, round up 1/4 div */
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if (spidiv & 0x3f) spidiv += 0x40;
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usart->CLKDIV = spidiv;
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usart->CTRL = USART_CTRL_SYNC;
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usart->CMD = USART_CMD_CLEARRX | USART_CMD_CLEARTX;
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usart->ROUTE = USART_ROUTE_TXPEN | USART_ROUTE_RXPEN | USART_ROUTE_CLKPEN;
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usart->CMD = USART_CMD_MASTEREN | USART_CMD_TXEN | USART_CMD_RXEN;
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}
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/**************************************************************************//**
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* @brief Disables GPIO pins and USART2 from FPGA register access
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*****************************************************************************/
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static void spiDisable(void)
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{
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USART_TypeDef *usart = USART2;
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GPIO_TypeDef *gpio = GPIO;
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/* Disable USART2 */
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usart->CTRL = _USART_CTRL_RESETVALUE;
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usart->ROUTE = _USART_ROUTE_RESETVALUE;
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usart->CMD = USART_CMD_MASTERDIS | USART_CMD_TXDIS | USART_CMD_RXDIS;
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/* Disable SPI pins */
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gpio->P[2].MODEH &= ~(_GPIO_P_MODEH_MODE13_MASK);
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gpio->P[2].MODEL &= ~(_GPIO_P_MODEL_MODE2_MASK |
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_GPIO_P_MODEL_MODE3_MASK |
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_GPIO_P_MODEL_MODE4_MASK |
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_GPIO_P_MODEL_MODE5_MASK);
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}
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/**************************************************************************//**
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* @brief Performs USART2 SPI Transfer
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*****************************************************************************/
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static uint16_t spiAccess(uint8_t spiadr, uint8_t rw, uint16_t spidata)
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{
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USART_TypeDef *usart = USART2;
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GPIO_TypeDef *gpio = GPIO;
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uint16_t tmp;
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clear_bit(gpio->P[2].DOUT, 5);
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/* SPI address */
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usart->TXDATA = (spiadr & 0x3) | rw << 3;
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while (!(usart->STATUS & USART_STATUS_TXC)) ;
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tmp = (usart->RXDATA) << 0;
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/* SPI data LSB */
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usart->TXDATA = spidata & 0xFF;
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while (!(usart->STATUS & USART_STATUS_TXC)) ;
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tmp = (usart->RXDATA);
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/* SPI data MSB */
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usart->TXDATA = spidata >> 8;
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while (!(usart->STATUS & USART_STATUS_TXC)) ;
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tmp |= (usart->RXDATA) << 8;
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gpio->P[2].DOUT |= (1 << 5);
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return tmp;
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}
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/**************************************************************************//**
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* @brief Performs USART2 SPI write to FPGA register
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* @param spiadr Address of register
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* @param spidata Data to write
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*****************************************************************************/
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static void spiWrite(uint8_t spiadr, uint16_t spidata)
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{
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spiAccess(spiadr, 0, spidata);
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}
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/**************************************************************************//**
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* @brief Performs USART2 SPI read from FPGA register
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* @param spiadr Address of register
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* @param spidata Dummy data
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*****************************************************************************/
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static uint16_t spiRead(uint8_t spiadr, uint16_t spidata)
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{
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return spiAccess(spiadr, 1, spidata);
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}
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/**************************************************************************//**
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* @brief Initializes DVK register access
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*****************************************************************************/
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void DVK_SPI_init(void)
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{
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uint16_t spiMagic;
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spiInit();
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/* Read "board control Magic" register to verify SPI is up and running */
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/* if not FPGA is configured to be in EBI mode */
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spiMagic = DVK_SPI_readRegister(BC_MAGIC);
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if (spiMagic != BC_MAGIC_VALUE)
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{
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/* Development Kit is configured to use EBI mode, restart of kit required */
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/* to use USART2-SPI for configuration */
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spiDisable();
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while (1) ;
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}
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}
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/**************************************************************************//**
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* @brief Disable and free up resources used by SPI board control access
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*****************************************************************************/
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void DVK_SPI_disable(void)
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{
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spiDisable();
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}
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/**************************************************************************//**
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* @brief Perform read from DVK board control register
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* @param addr Address of register to read from
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*****************************************************************************/
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uint16_t DVK_SPI_readRegister(volatile uint16_t *addr)
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{
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uint16_t data;
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if (addr != lastAddr)
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{
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spiWrite(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
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spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
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spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
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}
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/* Read twice */
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data = spiRead(0x03, 0);
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data = spiRead(0x03, 0);
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lastAddr = addr;
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return data;
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}
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/**************************************************************************//**
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* @brief Perform write to DVK board control register
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* @param addr Address of register to write to
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* @param data 16-bit to write into register
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*****************************************************************************/
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void DVK_SPI_writeRegister(volatile uint16_t *addr, uint16_t data)
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{
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if (addr != lastAddr)
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{
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spiWrite(0x00, 0xFFFF & ((uint32_t) addr)); /*LSBs of address*/
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spiWrite(0x01, 0xFF & ((uint32_t) addr >> 16)); /*MSBs of address*/
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spiWrite(0x02, (0x0C000000 & (uint32_t) addr) >> 26); /*Chip select*/
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}
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spiWrite(0x03, data); /*Data*/
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lastAddr = addr;
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}
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