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FreeRTOS-Kernel/FreeRTOS/Demo/RISC-V_RV64_PolarFire_SoftConsole
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chinglee-iot ec25164e48
Update riscv eclipse project (#1143) 
* Exclude examples in FreeRTOS-Kernel from build
* Update vega and microsemi risc-v eclipse project
* Update polarfire eclipse project
2023-12-20 16:50:43 +08:00
..
blinky_demo [AUTO][RELEASE]: Bump file header version to "202212.00" 2022-12-10 01:17:30 +00:00
full_demo Expand RV32E demo support, prevent 'ebreak' looping (#883) 2023-02-06 21:00:09 -08:00
polarfire_hal Add demo project for Polarfire board (#679) 2021-09-02 14:02:46 -07:00
.cproject Update riscv eclipse project (#1143) 2023-12-20 16:50:43 +08:00
.gitignore Add demo project for Polarfire board (#679) 2021-09-02 14:02:46 -07:00
.project Revert "Remove coroutines (#874)" (#1019) 2023-06-09 15:25:48 -07:00
FreeRTOSConfig.h Revert "Remove coroutines (#874)" (#1019) 2023-06-09 15:25:48 -07:00
FreeRTOSDemo_Debug.launch Add demo project for Polarfire board (#679) 2021-09-02 14:02:46 -07:00
main.c [AUTO][RELEASE]: Bump file header version to "202212.00" 2022-12-10 01:17:30 +00:00
README.md Add demo project for Polarfire board (#679) 2021-09-02 14:02:46 -07:00
vector_table.S [AUTO][RELEASE]: Bump file header version to "202212.00" 2022-12-10 01:17:30 +00:00

README.md

UART configuration

On connecting Icicle kit J11 to the host PC, you should see four COM port interfaces connected. This example project uses MMUART0. To use this project the host PC must connect to the COM port interface0 using a terminal emulator such as HyperTerminal or PuTTY configured as follows:

  • 115200 baud.
  • 8 data bits.
  • 1 stop bit.
  • no parity.
  • no flow control.

Target hardware

This example project is targeted at the Icicle kit. Details are available at the following link: https://www.microsemi.com/existing-parts/parts/152514

SoftConsole details

SoftConsole version used to test this project is available at link below: https://www.microsemi.com/product-directory/design-tools/4879-softconsole#downloads