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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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7d09b88e5a
The line 'Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.'
used to have two spaces between the first and second sentences.
This would cause the header check to fail due to the copyright regex located
ab999f9624/.github/scripts/core_checker.py (L396)
89 lines
3.3 KiB
C
89 lines
3.3 KiB
C
/*
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* FreeRTOS V202212.00
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "queue.h"
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/* Constants required for interrupt management. */
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#define tcpCLEAR_VIC_INTERRUPT ( 0 )
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#define tcpEINT0_VIC_CHANNEL_BIT ( ( unsigned long ) 0x4000 )
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/* EINT0 interrupt handler. This processes interrupts from the WIZnet device. */
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void vEINT0_ISR_Wrapper( void ) __attribute__((naked));
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/* The handler that goes with the EINT0 wrapper. */
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void vEINT0_ISR_Handler( void );
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/* Variable is required for its address, but does not otherwise get used. */
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static long lDummyVariable;
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/*
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* When the WIZnet device asserts an interrupt we send an (empty) message to
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* the TCP task. This wakes the task so the interrupt can be processed. The
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* source of the interrupt has to be ascertained by the TCP task as this
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* requires an I2C transaction which cannot be performed from this ISR.
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* Note this code predates the introduction of semaphores, a semaphore should
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* be used in place of the empty queue message.
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*/
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void vEINT0_ISR_Handler( void )
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{
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extern QueueHandle_t xTCPISRQueue;
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portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
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/* Just wake the TCP task so it knows an ISR has occurred. */
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xQueueSendFromISR( xTCPISRQueue, ( void * ) &lDummyVariable, &xHigherPriorityTaskWoken );
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/* We cannot carry on processing interrupts until the TCP task has
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processed this one - so for now interrupts are disabled. The TCP task will
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re-enable it. */
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VICIntEnClear |= tcpEINT0_VIC_CHANNEL_BIT;
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/* Clear the interrupt bit. */
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VICVectAddr = tcpCLEAR_VIC_INTERRUPT;
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if( xHigherPriorityTaskWoken )
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{
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portYIELD_FROM_ISR();
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}
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}
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/*-----------------------------------------------------------*/
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void vEINT0_ISR_Wrapper( void )
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{
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/* Save the context of the interrupted task. */
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portSAVE_CONTEXT();
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/* The handler must be a separate function from the wrapper to
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ensure the correct stack frame is set up. */
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vEINT0_ISR_Handler();
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/* Restore the context of whichever task is going to run next. */
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portRESTORE_CONTEXT();
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}
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