mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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1058 lines
37 KiB
C
1058 lines
37 KiB
C
/*
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FreeRTOS V6.0.0 - Copyright (C) 2009 Real Time Engineers Ltd.
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***************************************************************************
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* *
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* If you are: *
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* *
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* + New to FreeRTOS, *
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* + Wanting to learn FreeRTOS or multitasking in general quickly *
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* + Looking for basic training, *
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* + Wanting to improve your FreeRTOS skills and productivity *
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* *
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* then take a look at the FreeRTOS eBook *
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* *
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* "Using the FreeRTOS Real Time Kernel - a Practical Guide" *
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* http://www.FreeRTOS.org/Documentation *
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* *
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* A pdf reference manual is also available. Both are usually delivered *
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* to your inbox within 20 minutes to two hours when purchased between 8am *
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* and 8pm GMT (although please allow up to 24 hours in case of *
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* exceptional circumstances). Thank you for your support! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
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***NOTE*** The exception to the GPL is included to allow you to distribute
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a combined work that includes FreeRTOS without being obliged to provide the
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source code for proprietary components outside of the FreeRTOS kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details. You should have received a copy of the GNU General Public
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License and the FreeRTOS license exception along with FreeRTOS; if not it
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can be viewed here: http://www.freertos.org/a00114.html and also obtained
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by writing to Richard Barry, contact details for whom are available on the
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FreeRTOS WEB site.
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1 tab == 4 spaces!
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http://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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http://www.SafeRTOS.com - A version that is certified for use in safety
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critical systems.
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http://www.OpenRTOS.com - Commercial support, development, porting,
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licensing and training services.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM3 port.
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*----------------------------------------------------------*/
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/* Defining MPU_WRAPPERS_INCLUDED_FROM_API_FILE prevents task.h from redefining
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all the API functions to use the MPU wrappers. That should only be done when
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task.h is included from an application file. */
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#define MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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#include "queue.h"
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#undef MPU_WRAPPERS_INCLUDED_FROM_API_FILE
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/* Constants required to access and manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile unsigned long * ) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile unsigned long * ) 0xe000e014 )
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#define portNVIC_SYSPRI2 ( ( volatile unsigned long * ) 0xe000ed20 )
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#define portNVIC_SYSPRI1 ( ( volatile unsigned long * ) 0xe000ed1c )
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#define portNVIC_SYS_CTRL_STATE ( ( volatile unsigned long * ) 0xe000ed24 )
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#define portNVIC_MEM_FAULT_ENABLE ( 1UL << 16UL )
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/* Constants required to access and manipulate the MPU. */
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#define portMPU_TYPE ( ( volatile unsigned long * ) 0xe000ed90 )
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#define portMPU_REGION_BASE_ADDRESS ( ( volatile unsigned long * ) 0xe000ed9C )
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#define portMPU_REGION_ATTRIBUTE ( ( volatile unsigned long * ) 0xe000edA0 )
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#define portMPU_CTRL ( ( volatile unsigned long * ) 0xe000ed94 )
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#define portEXPECTED_MPU_TYPE_VALUE ( 8UL << 8UL ) /* 8 regions, unified. */
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#define portMPU_ENABLE ( 0x01UL )
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#define portMPU_BACKGROUND_ENABLE ( 1UL << 2UL )
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#define portPRIVILEGED_EXECUTION_START_ADDRESS ( 0UL )
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#define portMPU_REGION_VALID ( 0x10UL )
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#define portMPU_REGION_ENABLE ( 0x01UL )
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#define portPERIPHERALS_START_ADDRESS 0x40000000UL
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#define portPERIPHERALS_END_ADDRESS 0x5FFFFFFFUL
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/* Constants required to access and manipulate the SysTick. */
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#define portNVIC_SYSTICK_CLK ( 0x00000004UL )
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#define portNVIC_SYSTICK_INT ( 0x00000002UL )
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#define portNVIC_SYSTICK_ENABLE ( 0x00000001UL )
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#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16UL )
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#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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#define portNVIC_SVC_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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#define portINITIAL_CONTROL_IF_UNPRIVILEGED ( 0x03 )
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#define portINITIAL_CONTROL_IF_PRIVILEGED ( 0x02 )
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/* Offsets in the stack to the parameters when inside the SVC handler. */
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#define portOFFSET_TO_PC ( 6 )
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/* Set the privilege level to user mode if xRunningPrivileged is false. */
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#define portRESET_PRIVILEGE( xRunningPrivileged ) if( xRunningPrivileged != pdTRUE ) __asm volatile ( " mrs r0, control \n orr r0, #1 \n msr control, r0 " )
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/* Each task maintains its own interrupt status in the critical nesting
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variable. Note this is not saved as part of the task context as context
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switches can only occur when uxCriticalNesting is zero. */
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static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void ) PRIVILEGED_FUNCTION;
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/*
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* Configure a number of standard MPU regions that are used by all tasks.
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*/
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static void prvSetupMPU( void ) PRIVILEGED_FUNCTION;
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/*
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* Return the smallest MPU region size that a given number of bytes will fit
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* into. The region size is returned as the value that should be programmed
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* into the region attribute register for that region.
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*/
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static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes ) PRIVILEGED_FUNCTION;
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/*
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* Checks to see if being called from the context of an unprivileged task, and
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* if so raises the privilege level and returns false - otherwise does nothing
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* other than return true.
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*/
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static portBASE_TYPE prvRaisePrivilege( void ) __attribute__(( naked ));
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/*
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* Standard FreeRTOS exception handlers.
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*/
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void xPortPendSVHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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void xPortSysTickHandler( void ) __attribute__ ((optimize("3"))) PRIVILEGED_FUNCTION;
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void vPortSVCHandler( void ) __attribute__ (( naked )) PRIVILEGED_FUNCTION;
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/*
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* Starts the scheduler by restoring the context of the first task to run.
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*/
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static void prvRestoreContextOfFirstTask( void ) __attribute__(( naked )) PRIVILEGED_FUNCTION;
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/*
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* C portion of the SVC handler. The SVC handler is split between an asm entry
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* and a C wrapper for simplicity of coding and maintenance.
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*/
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static void prvSVCHandler( unsigned long *pulRegisters ) __attribute__(( noinline )) PRIVILEGED_FUNCTION;
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters, portBASE_TYPE xRunPrivileged )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = 0; /* LR */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
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pxTopOfStack -= 9; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
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if( xRunPrivileged == pdTRUE )
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{
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*pxTopOfStack = portINITIAL_CONTROL_IF_PRIVILEGED;
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}
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else
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{
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*pxTopOfStack = portINITIAL_CONTROL_IF_UNPRIVILEGED;
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}
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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void vPortSVCHandler( void )
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{
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/* Assumes psp was in use. */
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__asm volatile
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(
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#ifndef USE_PROCESS_STACK /* Code should not be required if a main() is using the process stack. */
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" tst lr, #4 \n"
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" ite eq \n"
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" mrseq r0, msp \n"
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" mrsne r0, psp \n"
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#else
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" mrs r0, psp \n"
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#endif
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" b prvSVCHandler \n"
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:::"r0"
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);
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/* This will never get executed, but is required to prevent prvSVCHandler
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being removed by the optimiser. */
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prvSVCHandler( NULL );
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}
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/*-----------------------------------------------------------*/
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static void prvSVCHandler( unsigned long *pulParam )
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{
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unsigned char ucSVCNumber;
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/* The stack contains: r0, r1, r2, r3, r12, r14, the return address and
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xPSR. The first argument (r0) is pulParam[ 0 ]. */
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ucSVCNumber = ( ( unsigned char * ) pulParam[ portOFFSET_TO_PC ] )[ -2 ];
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switch( ucSVCNumber )
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{
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case portSVC_START_SCHEDULER : *(portNVIC_SYSPRI1) |= portNVIC_SVC_PRI;
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prvRestoreContextOfFirstTask();
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break;
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case portSVC_YIELD : *(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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break;
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case portSVC_prvRaisePrivilege : __asm volatile
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(
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" mrs r1, control \n" /* Obtain current control value. */
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" bic r1, #1 \n" /* Set privilege bit. */
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" msr control, r1 \n" /* Write back new control value. */
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:::"r1"
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);
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break;
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default : /* Unknown SVC call. */
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break;
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}
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}
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/*-----------------------------------------------------------*/
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static void prvRestoreContextOfFirstTask( void )
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{
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__asm volatile
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(
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" ldr r0, =0xE000ED08 \n" /* Use the NVIC offset register to locate the stack. */
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" ldr r0, [r0] \n"
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" ldr r0, [r0] \n"
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" msr msp, r0 \n" /* Set the msp back to the start of the stack. */
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" ldr r3, pxCurrentTCBConst2 \n" /* Restore the context. */
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" ldr r1, [r3] \n"
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" ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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" add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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" ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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" stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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" ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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" msr control, r3 \n"
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" msr psp, r0 \n" /* Restore the task stack pointer. */
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" mov r0, #0 \n"
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" msr basepri, r0 \n"
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" ldr r14, =0xfffffffd \n" /* Load exec return code. */
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" bx r14 \n"
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB \n"
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);
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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portBASE_TYPE xPortStartScheduler( void )
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{
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/* Make PendSV and SysTick the same priroity as the kernel. */
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*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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/* Configure the regions in the MPU that are common to all tasks. */
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prvSetupMPU();
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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/* Start the first task. */
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__asm volatile( " svc %0 \n"
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:: "i" (portSVC_START_SCHEDULER) );
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the CM3 port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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portRESET_PRIVILEGE( xRunningPrivileged );
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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portRESET_PRIVILEGE( xRunningPrivileged );
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}
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/*-----------------------------------------------------------*/
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void xPortPendSVHandler( void )
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{
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/* This is a naked function. */
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__asm volatile
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(
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" mrs r0, psp \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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" mrs r1, control \n"
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" stmdb r0!, {r1, r4-r11} \n" /* Save the remaining registers. */
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" str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
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" \n"
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" stmdb sp!, {r3, r14} \n"
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" mov r0, %0 \n"
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" msr basepri, r0 \n"
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" bl vTaskSwitchContext \n"
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" mov r0, #0 \n"
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" msr basepri, r0 \n"
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" ldmia sp!, {r3, r14} \n"
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" \n" /* Restore the context. */
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" ldr r1, [r3] \n"
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" ldr r0, [r1] \n" /* The first item in the TCB is the task top of stack. */
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" add r1, r1, #4 \n" /* Move onto the second item in the TCB... */
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" ldr r2, =0xe000ed9c \n" /* Region Base Address register. */
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" ldmia r1!, {r4-r11} \n" /* Read 4 sets of MPU registers. */
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" stmia r2!, {r4-r11} \n" /* Write 4 sets of MPU registers. */
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" ldmia r0!, {r3, r4-r11} \n" /* Pop the registers that are not automatically saved on exception entry. */
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" msr control, r3 \n"
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" \n"
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" msr psp, r0 \n"
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" bx r14 \n"
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB \n"
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::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
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);
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}
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/*-----------------------------------------------------------*/
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void xPortSysTickHandler( void )
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{
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unsigned long ulDummy;
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/* If using preemption, also force a context switch. */
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#if configUSE_PREEMPTION == 1
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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#endif
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ulDummy = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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vTaskIncrementTick();
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulDummy );
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup the systick timer to generate the tick interrupts at the required
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* frequency.
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*/
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static void prvSetupTimerInterrupt( void )
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{
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/* Configure SysTick to interrupt at the requested rate. */
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*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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}
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/*-----------------------------------------------------------*/
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static void prvSetupMPU( void )
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{
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extern unsigned long __privileged_functions_end__[];
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extern unsigned long __FLASH_segment_start__[];
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extern unsigned long __FLASH_segment_end__[];
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extern unsigned long __privileged_data_start__[];
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extern unsigned long __privileged_data_end__[];
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/* Check the expected MPU is present. */
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if( *portMPU_TYPE == portEXPECTED_MPU_TYPE_VALUE )
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{
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/* First setup the entire flash for unprivileged read only access. */
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*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portUNPRIVILEGED_FLASH_REGION );
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*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_ONLY ) |
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( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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( prvGetMPURegionSizeSetting( ( unsigned long ) __FLASH_segment_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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( portMPU_REGION_ENABLE );
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/* Setup the first 16K for privileged only access (even though less
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than 10K is actually being used). This is where the kernel code is
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placed. */
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*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __FLASH_segment_start__ ) | /* Base address. */
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( portMPU_REGION_VALID ) |
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( portPRIVILEGED_FLASH_REGION );
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*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_ONLY ) |
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( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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( prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_functions_end__ - ( unsigned long ) __FLASH_segment_start__ ) ) |
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( portMPU_REGION_ENABLE );
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/* Setup the privileged data RAM region. This is where the kernel data
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is placed. */
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*portMPU_REGION_BASE_ADDRESS = ( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
|
|
( portMPU_REGION_VALID ) |
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( portPRIVILEGED_RAM_REGION );
|
|
|
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*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
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( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
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prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
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( portMPU_REGION_ENABLE );
|
|
|
|
/* By default allow everything to access the general peripherals. The
|
|
system peripherals and registers are protected. */
|
|
*portMPU_REGION_BASE_ADDRESS = ( portPERIPHERALS_START_ADDRESS ) |
|
|
( portMPU_REGION_VALID ) |
|
|
( portGENERAL_PERIPHERALS_REGION );
|
|
|
|
*portMPU_REGION_ATTRIBUTE = ( portMPU_REGION_READ_WRITE | portMPU_REGION_EXECUTE_NEVER ) |
|
|
( prvGetMPURegionSizeSetting( portPERIPHERALS_END_ADDRESS - portPERIPHERALS_START_ADDRESS ) ) |
|
|
( portMPU_REGION_ENABLE );
|
|
|
|
/* Enable the memory fault exception. */
|
|
*portNVIC_SYS_CTRL_STATE |= portNVIC_MEM_FAULT_ENABLE;
|
|
|
|
/* Enable the MPU with the background region configured. */
|
|
*portMPU_CTRL |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE );
|
|
}
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static unsigned long prvGetMPURegionSizeSetting( unsigned long ulActualSizeInBytes )
|
|
{
|
|
unsigned long ulRegionSize, ulReturnValue = 4;
|
|
|
|
/* 32 is the smallest region size, 31 is the largest valid value for
|
|
ulReturnValue. */
|
|
for( ulRegionSize = 32UL; ulReturnValue < 31UL; ( ulRegionSize <<= 1UL ) )
|
|
{
|
|
if( ulActualSizeInBytes <= ulRegionSize )
|
|
{
|
|
break;
|
|
}
|
|
else
|
|
{
|
|
ulReturnValue++;
|
|
}
|
|
}
|
|
|
|
/* Shift the code by one before returning so it can be written directly
|
|
into the the correct bit position of the attribute register. */
|
|
return ( ulReturnValue << 1UL );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
static portBASE_TYPE prvRaisePrivilege( void )
|
|
{
|
|
__asm volatile
|
|
(
|
|
" mrs r0, control \n"
|
|
" tst r0, #1 \n" /* Is the task running privileged? */
|
|
" itte ne \n"
|
|
" movne r0, #0 \n" /* CONTROL[0]!=0, return false. */
|
|
" svcne %0 \n" /* Switch to privileged. */
|
|
" moveq r0, #1 \n" /* CONTROL[0]==0, return true. */
|
|
" bx lr \n"
|
|
:: "i" (portSVC_prvRaisePrivilege) : "r0"
|
|
);
|
|
|
|
return 0;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS *xMPUSettings, const struct xMEMORY_REGION * const xRegions, portSTACK_TYPE *pxBottomOfStack, unsigned short usStackDepth )
|
|
{
|
|
extern unsigned long __SRAM_segment_start__[];
|
|
extern unsigned long __SRAM_segment_end__[];
|
|
extern unsigned long __privileged_data_start__[];
|
|
extern unsigned long __privileged_data_end__[];
|
|
long lIndex;
|
|
unsigned long ul;
|
|
|
|
if( xRegions == NULL )
|
|
{
|
|
/* No MPU regions are specified so allow access to all RAM. */
|
|
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
|
|
( ( unsigned long ) __SRAM_segment_start__ ) | /* Base address. */
|
|
( portMPU_REGION_VALID ) |
|
|
( portSTACK_REGION );
|
|
|
|
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
|
|
( portMPU_REGION_READ_WRITE ) |
|
|
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
|
|
( prvGetMPURegionSizeSetting( ( unsigned long ) __SRAM_segment_end__ - ( unsigned long ) __SRAM_segment_start__ ) ) |
|
|
( portMPU_REGION_ENABLE );
|
|
|
|
/* Re-instate the privileged only RAM region as xRegion[ 0 ] will have
|
|
just removed the privileged only parameters. */
|
|
xMPUSettings->xRegion[ 1 ].ulRegionBaseAddress =
|
|
( ( unsigned long ) __privileged_data_start__ ) | /* Base address. */
|
|
( portMPU_REGION_VALID ) |
|
|
( portSTACK_REGION + 1 );
|
|
|
|
xMPUSettings->xRegion[ 1 ].ulRegionAttribute =
|
|
( portMPU_REGION_PRIVILEGED_READ_WRITE ) |
|
|
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
|
|
prvGetMPURegionSizeSetting( ( unsigned long ) __privileged_data_end__ - ( unsigned long ) __privileged_data_start__ ) |
|
|
( portMPU_REGION_ENABLE );
|
|
|
|
/* Invalidate all other regions. */
|
|
for( ul = 2; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
|
|
{
|
|
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
|
|
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
/* This function is called automatically when the task is created - in
|
|
which case the stack region parameters will be valid. At all other
|
|
times the stack parameters will not be valid and it is assumed that the
|
|
stack region has already been configured. */
|
|
if( usStackDepth > 0 )
|
|
{
|
|
/* Define the region that allows access to the stack. */
|
|
xMPUSettings->xRegion[ 0 ].ulRegionBaseAddress =
|
|
( ( unsigned long ) pxBottomOfStack ) |
|
|
( portMPU_REGION_VALID ) |
|
|
( portSTACK_REGION ); /* Region number. */
|
|
|
|
xMPUSettings->xRegion[ 0 ].ulRegionAttribute =
|
|
( portMPU_REGION_READ_WRITE ) | /* Read and write. */
|
|
( prvGetMPURegionSizeSetting( ( unsigned long ) usStackDepth * ( unsigned long ) sizeof( portSTACK_TYPE ) ) ) |
|
|
( portMPU_REGION_CACHEABLE_BUFFERABLE ) |
|
|
( portMPU_REGION_ENABLE );
|
|
}
|
|
|
|
lIndex = 0;
|
|
|
|
for( ul = 1; ul <= portNUM_CONFIGURABLE_REGIONS; ul++ )
|
|
{
|
|
if( ( xRegions[ lIndex ] ).ulLengthInBytes > 0UL )
|
|
{
|
|
/* Translate the generic region definition contained in
|
|
xRegions into the CM3 specific MPU settings that are then
|
|
stored in xMPUSettings. */
|
|
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress =
|
|
( ( unsigned long ) xRegions[ lIndex ].pvBaseAddress ) |
|
|
( portMPU_REGION_VALID ) |
|
|
( portSTACK_REGION + ul ); /* Region number. */
|
|
|
|
xMPUSettings->xRegion[ ul ].ulRegionAttribute =
|
|
( prvGetMPURegionSizeSetting( xRegions[ lIndex ].ulLengthInBytes ) ) |
|
|
( xRegions[ lIndex ].ulParameters ) |
|
|
( portMPU_REGION_ENABLE );
|
|
}
|
|
else
|
|
{
|
|
/* Invalidate the region. */
|
|
xMPUSettings->xRegion[ ul ].ulRegionBaseAddress = ( portSTACK_REGION + ul ) | portMPU_REGION_VALID;
|
|
xMPUSettings->xRegion[ ul ].ulRegionAttribute = 0UL;
|
|
}
|
|
|
|
lIndex++;
|
|
}
|
|
}
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
signed portBASE_TYPE MPU_xTaskGenericCreate( pdTASK_CODE pvTaskCode, const signed char * const pcName, unsigned short usStackDepth, void *pvParameters, unsigned portBASE_TYPE uxPriority, xTaskHandle *pxCreatedTask, portSTACK_TYPE *puxStackBuffer, const xMemoryRegion * const xRegions )
|
|
{
|
|
signed portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskGenericCreate( pvTaskCode, pcName, usStackDepth, pvParameters, uxPriority, pxCreatedTask, puxStackBuffer, xRegions );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void MPU_vTaskAllocateMPURegions( xTaskHandle xTask, const xMemoryRegion * const xRegions )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskAllocateMPURegions( xTask, xRegions );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskDelete == 1 )
|
|
void MPU_vTaskDelete( xTaskHandle pxTaskToDelete )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskDelete( pxTaskToDelete );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskDelayUntil == 1 )
|
|
void MPU_vTaskDelayUntil( portTickType * const pxPreviousWakeTime, portTickType xTimeIncrement )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskDelayUntil( pxPreviousWakeTime, xTimeIncrement );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskDelay == 1 )
|
|
void MPU_vTaskDelay( portTickType xTicksToDelay )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskDelay( xTicksToDelay );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_uxTaskPriorityGet == 1 )
|
|
unsigned portBASE_TYPE MPU_uxTaskPriorityGet( xTaskHandle pxTask )
|
|
{
|
|
unsigned portBASE_TYPE uxReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
uxReturn = uxTaskPriorityGet( pxTask );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return uxReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskPrioritySet == 1 )
|
|
void MPU_vTaskPrioritySet( xTaskHandle pxTask, unsigned portBASE_TYPE uxNewPriority )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskPrioritySet( pxTask, uxNewPriority );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskSuspend == 1 )
|
|
void MPU_vTaskSuspend( xTaskHandle pxTaskToSuspend )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskSuspend( pxTaskToSuspend );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskSuspend == 1 )
|
|
signed portBASE_TYPE MPU_xTaskIsTaskSuspended( xTaskHandle xTask )
|
|
{
|
|
signed portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskIsTaskSuspended( xTask );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_vTaskSuspend == 1 )
|
|
void MPU_vTaskResume( xTaskHandle pxTaskToResume )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskResume( pxTaskToResume );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void MPU_vTaskSuspendAll( void )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskSuspendAll();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
signed portBASE_TYPE MPU_xTaskResumeAll( void )
|
|
{
|
|
signed portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskResumeAll();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
portTickType MPU_xTaskGetTickCount( void )
|
|
{
|
|
portTickType xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskGetTickCount();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
unsigned portBASE_TYPE MPU_uxTaskGetNumberOfTasks( void )
|
|
{
|
|
unsigned portBASE_TYPE uxReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
uxReturn = uxTaskGetNumberOfTasks();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return uxReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_TRACE_FACILITY == 1 )
|
|
void MPU_vTaskList( signed char *pcWriteBuffer )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskList( pcWriteBuffer );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configGENERATE_RUN_TIME_STATS == 1 )
|
|
void MPU_vTaskGetRunTimeStats( signed char *pcWriteBuffer )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskGetRunTimeStats( pcWriteBuffer );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_TRACE_FACILITY == 1 )
|
|
void MPU_vTaskStartTrace( signed char * pcBuffer, unsigned long ulBufferSize )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskStartTrace( pcBuffer, ulBufferSize );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_TRACE_FACILITY == 1 )
|
|
unsigned long MPU_ulTaskEndTrace( void )
|
|
{
|
|
unsigned long ulReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
ulReturn = ulTaskEndTrace();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return ulReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_APPLICATION_TASK_TAG == 1 )
|
|
void MPU_vTaskSetApplicationTaskTag( xTaskHandle xTask, pdTASK_HOOK_CODE pxTagValue )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vTaskSetApplicationTaskTag( xTask, pxTagValue );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_APPLICATION_TASK_TAG == 1 )
|
|
pdTASK_HOOK_CODE MPU_xTaskGetApplicationTaskTag( xTaskHandle xTask )
|
|
{
|
|
pdTASK_HOOK_CODE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskGetApplicationTaskTag( xTask );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_APPLICATION_TASK_TAG == 1 )
|
|
portBASE_TYPE MPU_xTaskCallApplicationTaskHook( xTaskHandle xTask, void *pvParameter )
|
|
{
|
|
portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskCallApplicationTaskHook( xTask, pvParameter );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_uxTaskGetStackHighWaterMark == 1 )
|
|
unsigned portBASE_TYPE MPU_uxTaskGetStackHighWaterMark( xTaskHandle xTask )
|
|
{
|
|
unsigned portBASE_TYPE uxReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
uxReturn = uxTaskGetStackHighWaterMark( xTask );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return uxReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_xTaskGetCurrentTaskHandle == 1 )
|
|
xTaskHandle MPU_xTaskGetCurrentTaskHandle( void )
|
|
{
|
|
xTaskHandle xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskGetCurrentTaskHandle();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( INCLUDE_xTaskGetSchedulerState == 1 )
|
|
portBASE_TYPE MPU_xTaskGetSchedulerState( void )
|
|
{
|
|
portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xTaskGetSchedulerState();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
xQueueHandle MPU_xQueueCreate( unsigned portBASE_TYPE uxQueueLength, unsigned portBASE_TYPE uxItemSize )
|
|
{
|
|
xQueueHandle xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueCreate( uxQueueLength, uxItemSize );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
signed portBASE_TYPE MPU_xQueueGenericSend( xQueueHandle xQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
|
|
{
|
|
signed portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueGenericSend( xQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
unsigned portBASE_TYPE MPU_uxQueueMessagesWaiting( const xQueueHandle pxQueue )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
unsigned portBASE_TYPE uxReturn;
|
|
|
|
uxReturn = uxQueueMessagesWaiting( pxQueue );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return uxReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
signed portBASE_TYPE MPU_xQueueGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
signed portBASE_TYPE xReturn;
|
|
|
|
xReturn = xQueueGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_MUTEXES == 1 )
|
|
xQueueHandle MPU_xQueueCreateMutex( void )
|
|
{
|
|
xQueueHandle xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueCreateMutex();
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if configUSE_COUNTING_SEMAPHORES == 1
|
|
xQueueHandle MPU_xQueueCreateCountingSemaphore( unsigned portBASE_TYPE uxCountValue, unsigned portBASE_TYPE uxInitialCount )
|
|
{
|
|
xQueueHandle xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueHandle xQueueCreateCountingSemaphore( uxCountValue, uxInitialCount );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_MUTEXES == 1 )
|
|
portBASE_TYPE MPU_xQueueTakeMutexRecursive( xQueueHandle xMutex, portTickType xBlockTime )
|
|
{
|
|
portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueTakeMutexRecursive( xMutex, xBlockTime );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if ( configUSE_MUTEXES == 1 )
|
|
portBASE_TYPE MPU_xQueueGiveMutexRecursive( xQueueHandle xMutex )
|
|
{
|
|
portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueGiveMutexRecursive( xMutex );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if configUSE_ALTERNATIVE_API == 1
|
|
signed portBASE_TYPE MPU_xQueueAltGenericSend( xQueueHandle pxQueue, const void * const pvItemToQueue, portTickType xTicksToWait, portBASE_TYPE xCopyPosition )
|
|
{
|
|
signed portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = signed portBASE_TYPE xQueueAltGenericSend( pxQueue, pvItemToQueue, xTicksToWait, xCopyPosition );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if configUSE_ALTERNATIVE_API == 1
|
|
signed portBASE_TYPE MPU_xQueueAltGenericReceive( xQueueHandle pxQueue, void * const pvBuffer, portTickType xTicksToWait, portBASE_TYPE xJustPeeking )
|
|
{
|
|
signed portBASE_TYPE xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xQueueAltGenericReceive( pxQueue, pvBuffer, xTicksToWait, xJustPeeking );
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
return xReturn;
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if configQUEUE_REGISTRY_SIZE > 0
|
|
void MPU_vQueueAddToRegistry( xQueueHandle xQueue, signed char *pcName )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vQueueAddToRegistry( xQueue, pcName );
|
|
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
#endif
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void *MPU_pvPortMalloc( size_t xSize )
|
|
{
|
|
void *pvReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
pvReturn = pvPortMalloc( xSize );
|
|
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
|
|
return pvReturn;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void MPU_vPortFree( void *pv )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vPortFree( pv );
|
|
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void MPU_vPortInitialiseBlocks( void )
|
|
{
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
vPortInitialiseBlocks();
|
|
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
size_t MPU_xPortGetFreeHeapSize( void )
|
|
{
|
|
size_t xReturn;
|
|
portBASE_TYPE xRunningPrivileged = prvRaisePrivilege();
|
|
|
|
xReturn = xPortGetFreeHeapSize();
|
|
|
|
portRESET_PRIVILEGE( xRunningPrivileged );
|
|
|
|
return xReturn;
|
|
}
|
|
|