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Kody Stribrny 54d4eeaa26
Add Vectored Interrupt Support To SiFive RISC-V Demo (#871) 
Update SiFive IAR demo to support vectored interrupts. This is a near copy of https://github.com/FreeRTOS/FreeRTOS/pull/797.

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-11-09 10:34:04 -08:00
..
CBMC Add Vectored Interrupt Support To SiFive RISC-V Demo (#871) 2022-11-09 10:34:04 -08:00
CMock Add a unit test for tasks.c (#867) 2022-11-03 11:48:53 -07:00
VeriFast Update VeriFast proofs (#836) 2022-10-27 14:54:38 -07:00
README.md Add uncrustify github workflow (#659) 2021-07-22 14:23:48 -07:00

README.md

Testing in FreeRTOS

FreeRTOS kernel consists of common code and porting layer. Extensive static analysis and dynamic analysis are done on both to ensure functional correctness of FreeRTOS kernel.

For more information on FreeRTOS testing please refer to https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html.

Directory structure

This directory is in working progress -- we are migrating scattered test cases to this directory. Here only lists what's currently under this directory.

  • ./CBMC: This directory contains automated proofs of the memory safety of various parts of the FreeRTOS code base.
  • ./VeriFast: This directory contains automated proofs of the functional correctness of various parts of the FreeRTOS code base.