mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2026-01-21 09:10:37 -05:00
367 lines
5.4 KiB
NASM
367 lines
5.4 KiB
NASM
; idt
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;
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; Copyright (C) 2025 Advanced Micro Devices, Inc. or its affiliates. All Rights Reserved.
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;
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; SPDX-License-Identifier: MIT
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;
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; Permission is hereby granted, free of charge, to any person obtaining a copy of
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; this software and associated documentation files (the "Software"), to deal in
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; the Software without restriction, including without limitation the rights to
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; use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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; the Software, and to permit persons to whom the Software is furnished to do so,
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; subject to the following conditions:
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;
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; The above copyright notice and this permission notice shall be included in all
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; copies or substantial portions of the Software.
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;
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; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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; FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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; COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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; IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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; CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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;
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section .text
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extern vHandler
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global sysint
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global read_isr
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global load_idt
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global load_cr3
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global starttask
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global read_cr2
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global InterruptReturn
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Interrupt:
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push rax
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push rbx
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push rcx
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push rdx
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push rsi
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push rdi
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push rbp
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push r8
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push r9
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push r10
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push r11
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push r12
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push r13
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push r14
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push r15
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mov rdi,rsp
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call vHandler
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InterruptReturn:
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pop r15
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pop r14
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pop r13
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pop r12
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pop r11
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pop r10
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pop r9
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pop r8
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pop rbp
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pop rdi
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pop rsi
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pop rdx
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pop rcx
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pop rbx
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pop rax
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add rsp,16
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iretq
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%macro VECTOR_1 1
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global vector%1
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vector%1:
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cli
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push byte %1
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jmp Interrupt
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%endmacro
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%macro VECTOR_2 1
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global vector%1
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vector%1:
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cli
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push 0
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push %1
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jmp Interrupt
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%endmacro
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VECTOR_2 0
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VECTOR_2 1
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VECTOR_2 2
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VECTOR_2 3
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VECTOR_2 4
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VECTOR_2 5
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VECTOR_2 6
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VECTOR_2 7
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; Error code is pushed by CPU for the following vectors
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; So we dont push error code in these vectors
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VECTOR_1 8
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VECTOR_1 10
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VECTOR_1 11
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VECTOR_1 12
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VECTOR_1 13
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VECTOR_1 14
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VECTOR_2 16
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VECTOR_1 17
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VECTOR_2 18
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VECTOR_2 19
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VECTOR_2 32
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VECTOR_2 33
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VECTOR_2 34
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VECTOR_2 35
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VECTOR_2 36
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VECTOR_2 37
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VECTOR_2 38
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VECTOR_2 39
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VECTOR_2 40
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VECTOR_2 41
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VECTOR_2 42
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VECTOR_2 43
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VECTOR_2 44
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VECTOR_2 45
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VECTOR_2 46
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VECTOR_2 47
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VECTOR_2 48
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VECTOR_2 49
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VECTOR_2 50
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VECTOR_2 51
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VECTOR_2 52
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VECTOR_2 53
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VECTOR_2 54
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VECTOR_2 55
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VECTOR_2 56
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VECTOR_2 57
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VECTOR_2 58
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VECTOR_2 59
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VECTOR_2 60
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VECTOR_2 61
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VECTOR_2 62
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VECTOR_2 63
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VECTOR_2 64
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VECTOR_2 65
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VECTOR_2 66
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VECTOR_2 67
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VECTOR_2 68
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VECTOR_2 69
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VECTOR_2 70
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VECTOR_2 71
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VECTOR_2 72
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VECTOR_2 73
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VECTOR_2 74
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VECTOR_2 75
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VECTOR_2 76
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VECTOR_2 77
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VECTOR_2 78
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VECTOR_2 79
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VECTOR_2 80
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VECTOR_2 81
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VECTOR_2 82
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VECTOR_2 83
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VECTOR_2 84
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VECTOR_2 85
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VECTOR_2 86
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VECTOR_2 87
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VECTOR_2 88
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VECTOR_2 89
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VECTOR_2 90
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VECTOR_2 91
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VECTOR_2 92
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VECTOR_2 93
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VECTOR_2 94
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VECTOR_2 95
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VECTOR_2 96
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VECTOR_2 97
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VECTOR_2 98
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VECTOR_2 99
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VECTOR_2 100
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VECTOR_2 101
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VECTOR_2 102
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VECTOR_2 103
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VECTOR_2 104
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VECTOR_2 105
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VECTOR_2 106
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VECTOR_2 107
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VECTOR_2 108
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VECTOR_2 109
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VECTOR_2 110
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VECTOR_2 111
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VECTOR_2 112
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VECTOR_2 113
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VECTOR_2 114
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VECTOR_2 115
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VECTOR_2 116
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VECTOR_2 117
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VECTOR_2 118
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VECTOR_2 119
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VECTOR_2 120
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VECTOR_2 121
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VECTOR_2 122
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VECTOR_2 123
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VECTOR_2 124
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VECTOR_2 125
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VECTOR_2 126
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VECTOR_2 127
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; 128 is used by system calls
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VECTOR_2 129
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VECTOR_2 130
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VECTOR_2 131
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VECTOR_2 132
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VECTOR_2 133
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VECTOR_2 134
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VECTOR_2 135
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VECTOR_2 136
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VECTOR_2 137
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VECTOR_2 138
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VECTOR_2 139
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VECTOR_2 140
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VECTOR_2 141
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VECTOR_2 142
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VECTOR_2 143
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VECTOR_2 144
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VECTOR_2 145
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VECTOR_2 146
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VECTOR_2 147
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VECTOR_2 148
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VECTOR_2 149
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VECTOR_2 150
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VECTOR_2 151
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VECTOR_2 152
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VECTOR_2 153
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VECTOR_2 154
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VECTOR_2 155
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VECTOR_2 156
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VECTOR_2 157
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VECTOR_2 158
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VECTOR_2 159
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VECTOR_2 160
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VECTOR_2 161
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VECTOR_2 162
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VECTOR_2 163
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VECTOR_2 164
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VECTOR_2 165
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VECTOR_2 166
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VECTOR_2 167
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VECTOR_2 168
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VECTOR_2 169
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VECTOR_2 170
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VECTOR_2 171
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VECTOR_2 172
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VECTOR_2 173
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VECTOR_2 174
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VECTOR_2 175
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VECTOR_2 176
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VECTOR_2 177
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VECTOR_2 178
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VECTOR_2 179
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VECTOR_2 180
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VECTOR_2 181
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VECTOR_2 182
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VECTOR_2 183
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VECTOR_2 184
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VECTOR_2 185
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VECTOR_2 186
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VECTOR_2 187
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VECTOR_2 188
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VECTOR_2 189
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VECTOR_2 190
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VECTOR_2 191
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VECTOR_2 192
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VECTOR_2 193
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VECTOR_2 194
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VECTOR_2 195
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VECTOR_2 196
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VECTOR_2 197
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VECTOR_2 198
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VECTOR_2 199
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VECTOR_2 200
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VECTOR_2 201
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VECTOR_2 202
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VECTOR_2 203
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VECTOR_2 204
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VECTOR_2 205
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VECTOR_2 206
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VECTOR_2 207
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VECTOR_2 208
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VECTOR_2 209
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VECTOR_2 210
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VECTOR_2 211
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VECTOR_2 212
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VECTOR_2 213
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VECTOR_2 214
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VECTOR_2 215
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VECTOR_2 216
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VECTOR_2 217
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VECTOR_2 218
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VECTOR_2 219
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VECTOR_2 220
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VECTOR_2 221
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VECTOR_2 222
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VECTOR_2 223
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VECTOR_2 224
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VECTOR_2 225
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VECTOR_2 226
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VECTOR_2 227
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VECTOR_2 228
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VECTOR_2 229
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VECTOR_2 230
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VECTOR_2 231
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VECTOR_2 232
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VECTOR_2 233
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VECTOR_2 234
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VECTOR_2 235
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VECTOR_2 236
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VECTOR_2 237
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VECTOR_2 238
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VECTOR_2 239
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VECTOR_2 240
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VECTOR_2 241
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VECTOR_2 242
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VECTOR_2 243
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VECTOR_2 244
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VECTOR_2 245
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VECTOR_2 246
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VECTOR_2 247
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VECTOR_2 248
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VECTOR_2 249
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VECTOR_2 250
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VECTOR_2 251
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VECTOR_2 252
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VECTOR_2 253
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VECTOR_2 254
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VECTOR_2 255
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sysint:
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push 0
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push 0x80
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jmp Interrupt
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read_isr:
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mov al,11
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out 0x20,al
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in al,0x20
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ret
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load_idt:
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lidt [rdi]
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ret
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load_cr3:
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mov rax,rdi
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mov cr3,rax
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ret
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read_cr2:
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mov rax,cr2
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ret
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starttask:
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mov rsp,rdi
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jmp InterruptReturn
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