FreeRTOS-Kernel/portable/GCC/RISC-V
Emmanuel Puerto 0037a6c574
RISC-V: Add RV32E / FPU support for GCC (#140)
* Change vPortSetupTimerInterrupt in order to have 64bits access on rv64

* Support RV32E - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Support FPU - RISC-V architecture (GCC)

Signed-off-by: Emmanuel Puerto <emmanuel.puerto@sifive.com>

* Fix interrupt managment and FPU initialization
2020-09-09 11:06:16 -07:00
..
chip_specific_extensions Style: Change FreeRTOS websites in comments (#131) 2020-08-20 14:59:28 -07:00
Documentation.url Style: Make freertos.org = FreeRTOS.org and add https (#134) 2020-08-21 11:30:39 -07:00
port.c RISC-V: Add RV32E / FPU support for GCC (#140) 2020-09-09 11:06:16 -07:00
portASM.S RISC-V: Add RV32E / FPU support for GCC (#140) 2020-09-09 11:06:16 -07:00
portmacro.h Style: Make freertos.org = FreeRTOS.org and add https (#134) 2020-08-21 11:30:39 -07:00
readme.txt Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00

/*
 * The FreeRTOS kernel's RISC-V port is split between the the code that is
 * common across all currently supported RISC-V chips (implementations of the
 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
 *
 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
 *   is common to all currently supported RISC-V chips.  There is only one
 *   portASM.S file because the same file is built for all RISC-V target chips.
 *
 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
 *   as there are multiple RISC-V chip implementations.
 *
 * !!!NOTE!!!
 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
 * compiler's!) include path.  For example, if the chip in use includes a core
 * local interrupter (CLINT) and does not include any chip specific register
 * extensions then add the path below to the assembler's include path:
 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
 *
 */