mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 21:41:59 -04:00
421 lines
17 KiB
C
421 lines
17 KiB
C
/*
|
|
FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd.
|
|
|
|
FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT
|
|
http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
|
|
|
|
***************************************************************************
|
|
* *
|
|
* FreeRTOS tutorial books are available in pdf and paperback. *
|
|
* Complete, revised, and edited pdf reference manuals are also *
|
|
* available. *
|
|
* *
|
|
* Purchasing FreeRTOS documentation will not only help you, by *
|
|
* ensuring you get running as quickly as possible and with an *
|
|
* in-depth knowledge of how to use FreeRTOS, it will also help *
|
|
* the FreeRTOS project to continue with its mission of providing *
|
|
* professional grade, cross platform, de facto standard solutions *
|
|
* for microcontrollers - completely free of charge! *
|
|
* *
|
|
* >>> See http://www.FreeRTOS.org/Documentation for details. <<< *
|
|
* *
|
|
* Thank you for using FreeRTOS, and thank you for your support! *
|
|
* *
|
|
***************************************************************************
|
|
|
|
|
|
This file is part of the FreeRTOS distribution.
|
|
|
|
FreeRTOS is free software; you can redistribute it and/or modify it under
|
|
the terms of the GNU General Public License (version 2) as published by the
|
|
Free Software Foundation AND MODIFIED BY the FreeRTOS exception.
|
|
|
|
>>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to
|
|
distribute a combined work that includes FreeRTOS without being obliged to
|
|
provide the source code for proprietary components outside of the FreeRTOS
|
|
kernel.
|
|
|
|
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
|
|
WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
|
|
FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
|
|
details. You should have received a copy of the GNU General Public License
|
|
and the FreeRTOS license exception along with FreeRTOS; if not it can be
|
|
viewed here: http://www.freertos.org/a00114.html and also obtained by
|
|
writing to Real Time Engineers Ltd., contact details for whom are available
|
|
on the FreeRTOS WEB site.
|
|
|
|
1 tab == 4 spaces!
|
|
|
|
***************************************************************************
|
|
* *
|
|
* Having a problem? Start by reading the FAQ "My application does *
|
|
* not run, what could be wrong?" *
|
|
* *
|
|
* http://www.FreeRTOS.org/FAQHelp.html *
|
|
* *
|
|
***************************************************************************
|
|
|
|
|
|
http://www.FreeRTOS.org - Documentation, books, training, latest versions,
|
|
license and Real Time Engineers Ltd. contact details.
|
|
|
|
http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
|
|
including FreeRTOS+Trace - an indispensable productivity tool, and our new
|
|
fully thread aware and reentrant UDP/IP stack.
|
|
|
|
http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
|
|
Integrity Systems, who sell the code with commercial support,
|
|
indemnification and middleware, under the OpenRTOS brand.
|
|
|
|
http://www.SafeRTOS.com - High Integrity Systems also provide a safety
|
|
engineered and independently SIL3 certified version for use in safety and
|
|
mission critical applications that require provable dependability.
|
|
*/
|
|
|
|
/*-----------------------------------------------------------
|
|
* Implementation of functions defined in portable.h for the ARM CM3 port.
|
|
*----------------------------------------------------------*/
|
|
|
|
/* IAR includes. */
|
|
#include <intrinsics.h>
|
|
|
|
/* Scheduler includes. */
|
|
#include "FreeRTOS.h"
|
|
#include "task.h"
|
|
|
|
#if configMAX_SYSCALL_INTERRUPT_PRIORITY == 0
|
|
#error configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to 0. See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html
|
|
#endif
|
|
|
|
#ifndef configSYSTICK_CLOCK_HZ
|
|
#define configSYSTICK_CLOCK_HZ configCPU_CLOCK_HZ
|
|
#endif
|
|
|
|
/* Constants required to manipulate the core. Registers first... */
|
|
#define portNVIC_SYSTICK_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000e010 ) )
|
|
#define portNVIC_SYSTICK_LOAD_REG ( * ( ( volatile unsigned long * ) 0xe000e014 ) )
|
|
#define portNVIC_SYSTICK_CURRENT_VALUE_REG ( * ( ( volatile unsigned long * ) 0xe000e018 ) )
|
|
#define portNVIC_SYSPRI2_REG ( * ( ( volatile unsigned long * ) 0xe000ed20 ) )
|
|
/* ...then bits in the registers. */
|
|
#define portNVIC_SYSTICK_CLK_BIT ( 1UL << 2UL )
|
|
#define portNVIC_SYSTICK_INT_BIT ( 1UL << 1UL )
|
|
#define portNVIC_SYSTICK_ENABLE_BIT ( 1UL << 0UL )
|
|
#define portNVIC_SYSTICK_COUNT_FLAG_BIT ( 1UL << 16UL )
|
|
#define portNVIC_PENDSVCLEAR_BIT ( 1UL << 27UL )
|
|
#define portNVIC_PEND_SYSTICK_CLEAR_BIT ( 1UL << 25UL )
|
|
|
|
#define portNVIC_PENDSV_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 16 )
|
|
#define portNVIC_SYSTICK_PRI ( ( ( unsigned long ) configKERNEL_INTERRUPT_PRIORITY ) << 24 )
|
|
|
|
/* Constants required to set up the initial stack. */
|
|
#define portINITIAL_XPSR ( 0x01000000 )
|
|
|
|
/* For backward compatibility, ensure configKERNEL_INTERRUPT_PRIORITY is
|
|
defined. The value 255 should also ensure backward compatibility.
|
|
FreeRTOS.org versions prior to V4.3.0 did not include this definition. */
|
|
#ifndef configKERNEL_INTERRUPT_PRIORITY
|
|
#define configKERNEL_INTERRUPT_PRIORITY 0
|
|
#endif
|
|
|
|
/* Each task maintains its own interrupt status in the critical nesting
|
|
variable. */
|
|
static unsigned portBASE_TYPE uxCriticalNesting = 0xaaaaaaaa;
|
|
|
|
/*
|
|
* Setup the timer to generate the tick interrupts. The implementation in this
|
|
* file is weak to allow application writers to change the timer used to
|
|
* generate the tick interrupt.
|
|
*/
|
|
void vPortSetupTimerInterrupt( void );
|
|
|
|
/*
|
|
* Exception handlers.
|
|
*/
|
|
void xPortSysTickHandler( void );
|
|
|
|
/*
|
|
* Start first task is a separate function so it can be tested in isolation.
|
|
*/
|
|
extern void vPortStartFirstTask( void );
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* The number of SysTick increments that make up one tick period.
|
|
*/
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
static unsigned long ulTimerReloadValueForOneTick = 0;
|
|
#endif
|
|
|
|
/*
|
|
* The maximum number of tick periods that can be suppressed is limited by the
|
|
* 24 bit resolution of the SysTick timer.
|
|
*/
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
static unsigned long xMaximumPossibleSuppressedTicks = 0;
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
|
|
/*
|
|
* Compensate for the CPU cycles that pass while the SysTick is stopped (low
|
|
* power functionality only.
|
|
*/
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
static unsigned long ulStoppedTimerCompensation = 0;
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* See header file for description.
|
|
*/
|
|
portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters )
|
|
{
|
|
/* Simulate the stack frame as it would be created by a context switch
|
|
interrupt. */
|
|
pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
|
|
*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = ( portSTACK_TYPE ) pxCode; /* PC */
|
|
pxTopOfStack--;
|
|
*pxTopOfStack = 0; /* LR */
|
|
pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
|
|
*pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */
|
|
pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */
|
|
|
|
return pxTopOfStack;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* See header file for description.
|
|
*/
|
|
portBASE_TYPE xPortStartScheduler( void )
|
|
{
|
|
/* Make PendSV and SysTick the lowest priority interrupts. */
|
|
portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
|
|
portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
|
|
|
|
/* Start the timer that generates the tick ISR. Interrupts are disabled
|
|
here already. */
|
|
vPortSetupTimerInterrupt();
|
|
|
|
/* Initialise the critical nesting count ready for the first task. */
|
|
uxCriticalNesting = 0;
|
|
|
|
/* Start the first task. */
|
|
vPortStartFirstTask();
|
|
|
|
/* Should not get here! */
|
|
return 0;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortEndScheduler( void )
|
|
{
|
|
/* It is unlikely that the CM3 port will require this function as there
|
|
is nothing to return to. */
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortYield( void )
|
|
{
|
|
/* Set a PendSV to request a context switch. */
|
|
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
|
|
|
/* Barriers are normally not required but do ensure the code is completely
|
|
within the specified behaviour for the architecture. */
|
|
__DSB();
|
|
__ISB();
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortEnterCritical( void )
|
|
{
|
|
portDISABLE_INTERRUPTS();
|
|
uxCriticalNesting++;
|
|
__DSB();
|
|
__ISB();
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void vPortExitCritical( void )
|
|
{
|
|
uxCriticalNesting--;
|
|
if( uxCriticalNesting == 0 )
|
|
{
|
|
portENABLE_INTERRUPTS();
|
|
}
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
void xPortSysTickHandler( void )
|
|
{
|
|
/* Only reset the systick load register if configUSE_TICKLESS_IDLE is set to
|
|
1. If it is set to 0 tickless idle is not being used. If it is set to a
|
|
value other than 0 or 1 then a timer other than the SysTick is being used
|
|
to generate the tick interrupt. */
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick;
|
|
#endif
|
|
|
|
( void ) portSET_INTERRUPT_MASK_FROM_ISR();
|
|
{
|
|
if( xTaskIncrementTick() != pdFALSE )
|
|
{
|
|
portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
|
|
}
|
|
}
|
|
portCLEAR_INTERRUPT_MASK_FROM_ISR( 0 );
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
|
|
__weak void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime )
|
|
{
|
|
unsigned long ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickIncrements;
|
|
portTickType xModifiableIdleTime;
|
|
|
|
/* Make sure the SysTick reload value does not overflow the counter. */
|
|
if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
|
|
{
|
|
xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
|
|
}
|
|
|
|
/* Calculate the reload value required to wait xExpectedIdleTime
|
|
tick periods. -1 is used because this code will execute part way
|
|
through one of the tick periods, and the fraction of a tick period is
|
|
accounted for later. */
|
|
ulReloadValue = ( ulTimerReloadValueForOneTick * ( xExpectedIdleTime - 1UL ) );
|
|
if( ulReloadValue > ulStoppedTimerCompensation )
|
|
{
|
|
ulReloadValue -= ulStoppedTimerCompensation;
|
|
}
|
|
|
|
/* Stop the SysTick momentarily. The time the SysTick is stopped for
|
|
is accounted for as best it can be, but using the tickless mode will
|
|
inevitably result in some tiny drift of the time maintained by the
|
|
kernel with respect to calendar time. */
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
|
|
|
|
/* Adjust the reload value to take into account that the current
|
|
time slice is already partially complete. */
|
|
ulReloadValue += ( portNVIC_SYSTICK_LOAD_REG - ( portNVIC_SYSTICK_LOAD_REG - portNVIC_SYSTICK_CURRENT_VALUE_REG ) );
|
|
|
|
/* Enter a critical section but don't use the taskENTER_CRITICAL()
|
|
method as that will mask interrupts that should exit sleep mode. */
|
|
__disable_interrupt();
|
|
|
|
/* If a context switch is pending or a task is waiting for the scheduler
|
|
to be unsuspended then abandon the low power entry. */
|
|
if( eTaskConfirmSleepModeStatus() == eAbortSleep )
|
|
{
|
|
/* Restart SysTick. */
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
|
|
|
/* Re-enable interrupts - see comments above __disable_interrupt()
|
|
call above. */
|
|
__enable_interrupt();
|
|
}
|
|
else
|
|
{
|
|
/* Set the new reload value. */
|
|
portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
|
|
|
|
/* Clear the SysTick count flag and set the count value back to
|
|
zero. */
|
|
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
|
|
|
/* Restart SysTick. */
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
|
|
|
/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
|
|
set its parameter to 0 to indicate that its implementation contains
|
|
its own wait for interrupt or wait for event instruction, and so wfi
|
|
should not be executed again. However, the original expected idle
|
|
time variable must remain unmodified, so a copy is taken. */
|
|
xModifiableIdleTime = xExpectedIdleTime;
|
|
configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
|
|
if( xModifiableIdleTime > 0 )
|
|
{
|
|
__DSB();
|
|
__WFI();
|
|
__ISB();
|
|
}
|
|
configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
|
|
|
|
/* Stop SysTick. Again, the time the SysTick is stopped for is
|
|
accounted for as best it can be, but using the tickless mode will
|
|
inevitably result in some tiny drift of the time maintained by the
|
|
kernel with respect to calendar time. */
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT;
|
|
|
|
/* Re-enable interrupts - see comments above __disable_interrupt()
|
|
call above. */
|
|
__enable_interrupt();
|
|
|
|
if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
|
|
{
|
|
/* The tick interrupt has already executed, and the SysTick
|
|
count reloaded with the portNVIC_SYSTICK_LOAD_REG value.
|
|
Reset the portNVIC_SYSTICK_LOAD_REG with whatever remains of
|
|
this tick period. */
|
|
portNVIC_SYSTICK_LOAD_REG = ulTimerReloadValueForOneTick - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
|
|
|
|
/* The tick interrupt handler will already have pended the tick
|
|
processing in the kernel. As the pending tick will be
|
|
processed as soon as this function exits, the tick value
|
|
maintained by the tick is stepped forward by one less than the
|
|
time spent waiting. */
|
|
ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
|
|
}
|
|
else
|
|
{
|
|
/* Something other than the tick interrupt ended the sleep.
|
|
Work out how long the sleep lasted. */
|
|
ulCompletedSysTickIncrements = ( xExpectedIdleTime * ulTimerReloadValueForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
|
|
|
|
/* How many complete tick periods passed while the processor
|
|
was waiting? */
|
|
ulCompleteTickPeriods = ulCompletedSysTickIncrements / ulTimerReloadValueForOneTick;
|
|
|
|
/* The reload value is set to whatever fraction of a single tick
|
|
period remains. */
|
|
portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1 ) * ulTimerReloadValueForOneTick ) - ulCompletedSysTickIncrements;
|
|
}
|
|
|
|
/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD_REG
|
|
again, then set portNVIC_SYSTICK_LOAD_REG back to its standard
|
|
value. */
|
|
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
|
|
|
vTaskStepTick( ulCompleteTickPeriods );
|
|
}
|
|
}
|
|
|
|
#endif /* #if configUSE_TICKLESS_IDLE */
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Setup the systick timer to generate the tick interrupts at the required
|
|
* frequency.
|
|
*/
|
|
__weak void vPortSetupTimerInterrupt( void )
|
|
{
|
|
/* Calculate the constants required to configure the tick interrupt. */
|
|
#if configUSE_TICKLESS_IDLE == 1
|
|
{
|
|
ulTimerReloadValueForOneTick = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
|
|
xMaximumPossibleSuppressedTicks = 0xffffffUL / ( ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
|
|
ulStoppedTimerCompensation = 45UL / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ );
|
|
}
|
|
#endif /* configUSE_TICKLESS_IDLE */
|
|
|
|
/* Configure SysTick to interrupt at the requested rate. */
|
|
portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;;
|
|
portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
|
|
}
|
|
/*-----------------------------------------------------------*/
|
|
|