Corentin Pane b4972f4093 Mask MPU region base addresses when writing to MPU_RBAR on ARM_CM3/4 ... Bits 0-4 are reserved for VALID and REGION, while ADDR spans at most bits 5-31 (bits 5-7 are sometimes reserved and not assigned to ADDR field). Masking ensures that a misaligned base address cannot modify less significant bits in the attribute reserved for other use. Failing to mask the address may allow a malicious user to pass in misaligned addresses in a user-defined region or as stack buffer which could in turn override the settings for higher-priority kernel-defined regions. This change doesn't guarantee that only properly aligned addresses are written to the ADDR field of the register, and doesn't ensure that reserved field from bits 5-7 are not written to, but protects the VALID and REGION fields.		2026-08-31 16:34:46 +02:00
..
mpu_wrappers_v2_asm.S	Remove duplicate pop from MPU Wrappers ASM Files (#1008)	2024-03-18 16:21:21 +05:30
port.c	Mask MPU region base addresses when writing to MPU_RBAR on ARM_CM3/4	2026-08-31 16:34:46 +02:00
portasm.s	Use Regex for Copyright Year in Header Check (#1002)	2024-02-26 09:26:42 -08:00
portmacro.h	Fix the context array size for MPU ports (#1230)	2025-01-25 13:34:03 +05:30