FreeRTOS-Kernel/portable/GCC/RISC-V
Vishwanath Martur 8e434c1385 Add memory protection support to RISC-V port
Related to #908

Add memory protection support to the RISC-V port.

* **Memory Protection Configurations and Settings**
  - Add memory protection-related configurations and settings in `portable/GCC/RISC-V/portmacro.h` and `portable/IAR/RISC-V/portmacro.h`.
  - Define macros for enabling and disabling memory protection in both files.

* **Critical Section Handling**
  - Update the `portENTER_CRITICAL` and `portEXIT_CRITICAL` macros in `portable/GCC/RISC-V/portmacro.h` and `portable/IAR/RISC-V/portmacro.h` to handle memory protection.

* **Chip-Specific Extensions**
  - Add memory protection-related definitions and macros in `portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h` and `portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h`.
  - Define macros for saving and restoring memory protection context in both files.

* **Port Functions**
  - Add functions for enabling and disabling memory protection in `portable/GCC/RISC-V/port.c` and `portable/IAR/RISC-V/port.c`.

Working on still: portASM.s planning to implement ASAP
2024-11-01 12:26:29 +05:30
..
chip_specific_extensions Add memory protection support to RISC-V port 2024-11-01 12:26:29 +05:30
chip_extensions.cmake Support configurable RISC-V chip extension (#773) 2023-10-27 11:57:52 -07:00
Documentation.url Normalize line endings and whitespace in source files 2022-11-29 15:38:47 -08:00
port.c Add memory protection support to RISC-V port 2024-11-01 12:26:29 +05:30
portASM.S Fix the pxTopcOfStack typo in the RISC-V ports. (#1030) 2024-04-15 10:10:10 +05:30
portContext.h Use Regex for Copyright Year in Header Check (#1002) 2024-02-26 09:26:42 -08:00
portmacro.h Add memory protection support to RISC-V port 2024-11-01 12:26:29 +05:30
readme.txt Normalize line endings and whitespace in source files 2022-11-29 15:38:47 -08:00

/*
 * The FreeRTOS kernel's RISC-V port is split between the the code that is
 * common across all currently supported RISC-V chips (implementations of the
 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
 *
 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
 *   is common to all currently supported RISC-V chips.  There is only one
 *   portASM.S file because the same file is built for all RISC-V target chips.
 *
 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
 *   as there are multiple RISC-V chip implementations.
 *
 * !!!NOTE!!!
 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
 * compiler's!) include path.  For example, if the chip in use includes a core
 * local interrupter (CLINT) and does not include any chip specific register
 * extensions then add the path below to the assembler's include path:
 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
 *
 */