mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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257 lines
8.1 KiB
C
257 lines
8.1 KiB
C
/*
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FreeRTOS V9.0.0 - Copyright (C) 2016 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#include "FreeRTOSConfig.h"
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#define portCONTEXT_SIZE 132
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#define portEPC_STACK_LOCATION 124
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#define portSTATUS_STACK_LOCATION 128
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#ifdef __LANGUAGE_ASSEMBLY__
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/******************************************************************/
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.macro portSAVE_CONTEXT
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/* Make room for the context. First save the current status so it can be
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manipulated, and the cause and EPC registers so their original values are
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captured. */
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mfc0 k0, _CP0_CAUSE
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addiu sp, sp, -portCONTEXT_SIZE
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mfc0 k1, _CP0_STATUS
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/* Also save s6 and s5 so they can be used. Any nesting interrupts should
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maintain the values of these registers across the ISR. */
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sw s6, 44(sp)
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sw s5, 40(sp)
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sw k1, portSTATUS_STACK_LOCATION(sp)
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/* Prepare to enable interrupts above the current priority.
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k0 = k0 >> 10. Moves RIPL[17:10] to [7:0] */
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srl k0, k0, 0xa
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/* Insert bit field. 7 bits k0[6:0] to k1[16:10] */
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ins k1, k0, 10, 7
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/* Sets CP0.Status.IPL = CP0.Cause.RIPL
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Copy the MSB of the IPL, but it would be an error if it was set anyway. */
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srl k0, k0, 0x7
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/* MSB of IPL is bit[18] of CP0.Status */
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ins k1, k0, 18, 1
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/* CP0.Status[5:1] = 0 b[5]=Rsvd, b[4]=UM,
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b[3]=Rsvd, b[2]=ERL, b[1]=EXL
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Setting EXL=0 allows higher priority interrupts
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to preempt this handler */
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ins k1, zero, 1, 4
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/* s5 is used as the frame pointer. */
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add s5, zero, sp
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/* Check the nesting count value. */
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la k0, uxInterruptNesting
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lw s6, (k0)
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/* If the nesting count is 0 then swap to the the system stack, otherwise
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the system stack is already being used. */
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bne s6, zero, 1f
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nop
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/* Swap to the system stack. */
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la sp, xISRStackTop
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lw sp, (sp)
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/* Increment and save the nesting count. */
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1: addiu s6, s6, 1
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sw s6, 0(k0)
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/* s6 holds the EPC value, this is saved after interrupts are re-enabled. */
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mfc0 s6, _CP0_EPC
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/* Re-enable interrupts. */
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mtc0 k1, _CP0_STATUS
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/* Save the context into the space just created. s6 is saved again
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here as it now contains the EPC value. No other s registers need be
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saved. */
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sw ra, 120(s5) /* Return address (RA=R31) */
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sw s8, 116(s5) /* Frame Pointer (FP=R30) */
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sw t9, 112(s5)
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sw t8, 108(s5)
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sw t7, 104(s5)
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sw t6, 100(s5)
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sw t5, 96(s5)
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sw t4, 92(s5)
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sw t3, 88(s5)
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sw t2, 84(s5)
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sw t1, 80(s5)
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sw t0, 76(s5)
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sw a3, 72(s5)
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sw a2, 68(s5)
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sw a1, 64(s5)
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sw a0, 60(s5)
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sw v1, 56(s5)
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sw v0, 52(s5)
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sw s6, portEPC_STACK_LOCATION(s5)
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sw $1, 16(s5)
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/* MEC14xx does not have DSP, removed 7 words */
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mfhi s6
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sw s6, 12(s5)
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mflo s6
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sw s6, 8(s5)
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/* Update the task stack pointer value if nesting is zero. */
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la s6, uxInterruptNesting
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lw s6, (s6)
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addiu s6, s6, -1
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bne s6, zero, 1f
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nop
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/* Save the stack pointer. */
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la s6, uxSavedTaskStackPointer
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sw s5, (s6)
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1:
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.endm
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/******************************************************************/
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.macro portRESTORE_CONTEXT
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/* Restore the stack pointer from the TCB. This is only done if the
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nesting count is 1. */
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la s6, uxInterruptNesting
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lw s6, (s6)
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addiu s6, s6, -1
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bne s6, zero, 1f
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nop
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la s6, uxSavedTaskStackPointer
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lw s5, (s6)
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/* Restore the context.
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MCHP MEC14xx does not include DSP */
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1:
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lw s6, 8(s5)
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mtlo s6
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lw s6, 12(s5)
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mthi s6
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lw $1, 16(s5)
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/* s6 is loaded as it was used as a scratch register and therefore saved
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as part of the interrupt context. */
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lw s6, 44(s5)
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lw v0, 52(s5)
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lw v1, 56(s5)
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lw a0, 60(s5)
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lw a1, 64(s5)
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lw a2, 68(s5)
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lw a3, 72(s5)
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lw t0, 76(s5)
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lw t1, 80(s5)
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lw t2, 84(s5)
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lw t3, 88(s5)
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lw t4, 92(s5)
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lw t5, 96(s5)
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lw t6, 100(s5)
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lw t7, 104(s5)
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lw t8, 108(s5)
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lw t9, 112(s5)
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lw s8, 116(s5)
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lw ra, 120(s5)
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/* Protect access to the k registers, and others. */
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di
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ehb
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/* Decrement the nesting count. */
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la k0, uxInterruptNesting
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lw k1, (k0)
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addiu k1, k1, -1
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sw k1, 0(k0)
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lw k0, portSTATUS_STACK_LOCATION(s5)
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lw k1, portEPC_STACK_LOCATION(s5)
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/* Leave the stack in its original state. First load sp from s5, then
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restore s5 from the stack. */
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add sp, zero, s5
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lw s5, 40(sp)
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addiu sp, sp, portCONTEXT_SIZE
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mtc0 k0, _CP0_STATUS
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mtc0 k1, _CP0_EPC
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ehb
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eret
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nop
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.endm
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#endif /* #ifdef __LANGUAGE_ASSEMBLY__ */
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