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bac101c988
* fix: CLEAR MIE BIT IN INITIAL RISC-V MSTATUS VALUE The MIE bit in the RISC-V MSTATUS register is used to globally enable or disable interrupts. It is copied into the MPIE bit and cleared on entry to an interrupt, and then copied back from the MPIE bit on exit from an interrupt. When a task is created it is given an initial MSTATUS value that is derived from the current MSTATUS value with the MPIE bit force to 1, but the MIE bit is not forced into any state. This change forces the MIE bit to 0 (interrupts disabled). Why: If a task is created before the scheduler is started the MIE bit will happen to be 0 (interrupts disabled), which is fine. If a task is created after the scheduler has been started the MIE bit is set (interrupts enabled), causing interrupts to unintentionally become enabled inside the interrupt in which the task is first moved to the running state - effectively breaking a critical section which in turn could cause a crash if enabling interrupts causes interrupts to nest. It is only an issue when starting a newly created task that was created after the scheduler was started. Related Issues: https://forums.freertos.org/t/risc-v-port-pxportinitialisestack-issue-about-mstatus-value-onto-the-stack/9622 Co-authored-by: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> |
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| .. | ||
| chip_specific_extensions | ||
| Documentation.url | ||
| port.c | ||
| portASM.s | ||
| portmacro.h | ||
| readme.txt | ||
/* * The FreeRTOS kernel's RISC-V port is split between the the code that is * common across all currently supported RISC-V chips (implementations of the * RISC-V ISA), and code that tailors the port to a specific RISC-V chip: * * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that * is common to all currently supported RISC-V chips. There is only one * portASM.S file because the same file is built for all RISC-V target chips. * * + Header files called freertos_risc_v_chip_specific_extensions.h contain the * code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V * chip. There are multiple freertos_risc_v_chip_specific_extensions.h files * as there are multiple RISC-V chip implementations. * * !!!NOTE!!! * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h * HEADER FILE FOR THE CHIP IN USE. This is done using the assembler's (not the * compiler's!) include path. For example, if the chip in use includes a core * local interrupter (CLINT) and does not include any chip specific register * extensions then add the path below to the assembler's include path: * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions * */