mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-20 13:31:58 -04:00
110 lines
4.6 KiB
C
110 lines
4.6 KiB
C
/*
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* FreeRTOS Kernel V10.2.0
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* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#include "FreeRTOS.h"
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#include "task.h"
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__declspec(interrupt:0) void vPIT0InterruptHandler( void );
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/* Constants used to configure the interrupts. */
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#define portPRESCALE_VALUE 64
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#define portPRESCALE_REG_SETTING ( 5 << 8 )
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#define portPIT_INTERRUPT_ENABLED ( 0x08 )
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#define configPIT0_INTERRUPT_VECTOR ( 55 )
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/*
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* FreeRTOS.org requires two interrupts - a tick interrupt generated from a
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* timer source, and a spare interrupt vector used for context switching.
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* The configuration below uses PIT0 for the former, and vector 16 for the
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* latter. **IF YOUR APPLICATION HAS BOTH OF THESE INTERRUPTS FREE THEN YOU DO
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* NOT NEED TO CHANGE ANY OF THIS CODE** - otherwise instructions are provided
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* here for using alternative interrupt sources.
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*
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* To change the tick interrupt source:
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*
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* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
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* peripheral is to be used to generate the tick interrupt. The name of the
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* handler function (currently vPIT0InterruptHandler()) should also be updated
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* to indicate which peripheral is generating the interrupt.
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*
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* 2) Make sure the interrupt source is cleared within the interrupt handler function.
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* Currently vPIT0InterruptHandler() clears the PIT0 interrupt.
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*
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* 3) Update the vector table within mcf5225x_vectors.s to install the tick
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* interrupt handler in the correct vector position.
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*
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* To change the spare interrupt source:
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*
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* 1) Modify vApplicationSetupInterrupts() below to be correct for whichever
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* interrupt vector is to be used. Make sure you use a spare interrupt on interrupt
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* controller 0, otherwise the register used to request context switches will also
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* require modification.
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*
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* 2) Change the definition of configYIELD_INTERRUPT_VECTOR within FreeRTOSConfig.h
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* to be correct for your chosen interrupt vector.
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*
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* 3) Update the vector table within mcf5225x_vectors.s to install the handler
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* _vPortYieldISR() in the correct vector position (by default vector number 16 is
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* used).
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*/
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void vApplicationSetupInterrupts( void )
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{
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const unsigned short usCompareMatchValue = ( ( configCPU_CLOCK_HZ / portPRESCALE_VALUE ) / configTICK_RATE_HZ );
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/* Configure interrupt priority and level and unmask interrupt for PIT0. */
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MCF_INTC0_ICR55 = ( 1 | ( configKERNEL_INTERRUPT_PRIORITY << 3 ) );
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MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK55 );
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/* Do the same for vector 63 (interrupt controller 0. I don't think the
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write to MCF_INTC0_IMRH is actually required here but is included for
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completeness. */
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MCF_INTC0_ICR16 = ( 0 | configKERNEL_INTERRUPT_PRIORITY << 3 );
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MCF_INTC0_IMRL &= ~( MCF_INTC_IMRL_INT_MASK16 | 0x01 );
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/* Configure PIT0 to generate the RTOS tick. */
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MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
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MCF_PIT0_PCSR = ( portPRESCALE_REG_SETTING | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN );
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MCF_PIT0_PMR = usCompareMatchValue;
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}
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/*-----------------------------------------------------------*/
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__declspec(interrupt:0) void vPIT0InterruptHandler( void )
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{
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unsigned long ulSavedInterruptMask;
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/* Clear the PIT0 interrupt. */
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MCF_PIT0_PCSR |= MCF_PIT_PCSR_PIF;
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/* Increment the RTOS tick. */
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ulSavedInterruptMask = portSET_INTERRUPT_MASK_FROM_ISR();
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if( xTaskIncrementTick() != pdFALSE )
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{
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taskYIELD();
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulSavedInterruptMask );
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}
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