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5fdbb7fd2b
* Cortex-M35P: Add Cortex-M35P port The Cortex-M35P support added to kernel. The port hasn't been validated yet with TF-M. Hence TF-M support is not included in this port. Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> * Add portNORETURN to the newly added portmacro.h Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> --------- Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com> Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com> Co-authored-by: kar-rahul-aws <118818625+kar-rahul-aws@users.noreply.github.com>
55 lines
2.1 KiB
C
55 lines
2.1 KiB
C
/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef __SECURE_INIT_H__
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#define __SECURE_INIT_H__
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/**
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* @brief De-prioritizes the non-secure exceptions.
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*
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* This is needed to ensure that the non-secure PendSV runs at the lowest
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* priority. Context switch is done in the non-secure PendSV handler.
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*
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* @note This function must be called in the handler mode. It is no-op if called
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* in the thread mode.
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*/
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void SecureInit_DePrioritizeNSExceptions( void );
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/**
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* @brief Sets up the Floating Point Unit (FPU) for Non-Secure access.
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*
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* Also sets FPCCR.TS=1 to ensure that the content of the Floating Point
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* Registers are not leaked to the non-secure side.
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*
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* @note This function must be called in the handler mode. It is no-op if called
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* in the thread mode.
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*/
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void SecureInit_EnableNSFPUAccess( void );
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#endif /* __SECURE_INIT_H__ */
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