FreeRTOS-Kernel/FreeRTOS/Source/portable/IAR/ARM_CA5_No_GIC
Richard Barry b2e739495a Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.
2014-08-03 18:37:58 +00:00
..
port.c Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.: 2014-08-03 18:37:58 +00:00
portASM.h Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.: 2014-08-03 18:37:58 +00:00
portASM.s Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.: 2014-08-03 18:37:58 +00:00
portmacro.h Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.: 2014-08-03 18:37:58 +00:00