mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-23 15:01:56 -04:00
73606369c4
Don't reset the stack location when starting the scheduler in Cortex-M0 ports as the vector offset register is not implemented and XMC1000 devices have their application vector address somewhere other than 0x00.
172 lines
6.3 KiB
ArmAsm
172 lines
6.3 KiB
ArmAsm
/*
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FreeRTOS V7.5.2 - Copyright (C) 2013 Real Time Engineers Ltd.
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that has become a de facto standard. *
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* *
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* Help yourself get started quickly and support the FreeRTOS *
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* project by purchasing a FreeRTOS tutorial book, reference *
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* manual, or both from: http://www.FreeRTOS.org/Documentation *
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* *
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* Thank you! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to distribute
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>>! a combined work that includes FreeRTOS without being obliged to provide
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>>! the source code for proprietary components outside of the FreeRTOS
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>>! kernel.
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available from the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#include <FreeRTOSConfig.h>
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RSEG CODE:CODE(2)
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thumb
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EXTERN vPortYieldFromISR
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EXTERN pxCurrentTCB
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EXTERN vTaskSwitchContext
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PUBLIC vSetMSP
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PUBLIC xPortPendSVHandler
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PUBLIC vPortSVCHandler
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PUBLIC vPortStartFirstTask
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PUBLIC ulSetInterruptMaskFromISR
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PUBLIC vClearInterruptMaskFromISR
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/*-----------------------------------------------------------*/
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vSetMSP
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msr msp, r0
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bx lr
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/*-----------------------------------------------------------*/
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xPortPendSVHandler:
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mrs r0, psp
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ldr r3, =pxCurrentTCB /* Get the location of the current TCB. */
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ldr r2, [r3]
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subs r0, r0, #32 /* Make space for the remaining low registers. */
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str r0, [r2] /* Save the new top of stack. */
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stmia r0!, {r4-r7} /* Store the low registers that are not saved automatically. */
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mov r4, r8 /* Store the high registers. */
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mov r5, r9
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mov r6, r10
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mov r7, r11
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stmia r0!, {r4-r7}
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push {r3, r14}
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cpsid i
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bl vTaskSwitchContext
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cpsie i
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pop {r2, r3} /* lr goes in r3. r2 now holds tcb pointer. */
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ldr r1, [r2]
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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adds r0, r0, #16 /* Move to the high registers. */
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ldmia r0!, {r4-r7} /* Pop the high registers. */
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mov r8, r4
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mov r9, r5
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mov r10, r6
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mov r11, r7
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msr psp, r0 /* Remember the new top of stack for the task. */
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subs r0, r0, #32 /* Go back for the low registers that are not automatically restored. */
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ldmia r0!, {r4-r7} /* Pop low registers. */
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bx r3
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/*-----------------------------------------------------------*/
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vPortSVCHandler;
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ldr r3, =pxCurrentTCB /* Restore the context. */
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ldr r1, [r3] /* Get the pxCurrentTCB address. */
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ldr r0, [r1] /* The first item in pxCurrentTCB is the task top of stack. */
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adds r0, r0, #16 /* Move to the high registers. */
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ldmia r0!, {r4-r7} /* Pop the high registers. */
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mov r8, r4
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mov r9, r5
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mov r10, r6
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mov r11, r7
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msr psp, r0 /* Remember the new top of stack for the task. */
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subs r0, r0, #32 /* Go back for the low registers that are not automatically restored. */
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ldmia r0!, {r4-r7} /* Pop low registers. */
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mov r1, r14 /* OR R14 with 0x0d. */
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movs r0, #0x0d
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orrs r1, r0
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bx r1
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/*-----------------------------------------------------------*/
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vPortStartFirstTask
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/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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table offset register that can be used to locate the initial stack value.
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Not all M0 parts have the application vector table at address 0. */
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cpsie i /* Globally enable interrupts. */
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svc 0 /* System call to start first task. */
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nop
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/*-----------------------------------------------------------*/
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ulSetInterruptMaskFromISR
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mrs r0, PRIMASK
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cpsid i
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bx lr
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/*-----------------------------------------------------------*/
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vClearInterruptMaskFromISR
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msr PRIMASK, r0
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bx lr
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END
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