mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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989bc332b2
* Add XMOS XCore ports Some minor modifications are also made to the kernel to support the XCore compiler's automatic stack size calculation. * Update kernel to support SMP The XMOS XCore ports are also updated to support SMP. * Fix compiler warnings in xcore ports The port set and clear interrupt mask from ISR macros were removed from the ports so that the default macros found in FreeRTOS.h are used instead. The default macros do not result in warnings when they are used. * Remove inline function from timers.h Inline function converted to macro. This should now build when optimizations are off and inlining is disabled. * Fix compiler warnings in xcore ports and tasks.c * fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() * spelling fixes for tasks.c Co-authored-by: Michael Bruno <mikeb@xmos.com>
237 lines
5.4 KiB
NASM
237 lines
5.4 KiB
NASM
;/*
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; * FreeRTOS Kernel V10.4.3
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; * Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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; *
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; * Permission is hereby granted, free of charge, to any person obtaining a copy of
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; * this software and associated documentation files (the "Software"), to deal in
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; * the Software without restriction, including without limitation the rights to
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; * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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; * the Software, and to permit persons to whom the Software is furnished to do so,
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; * subject to the following conditions:
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; *
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; * The above copyright notice and this permission notice shall be included in all
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; * copies or substantial portions of the Software.
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; *
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; * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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; * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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; * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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; * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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; * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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; * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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; *
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; * https://www.FreeRTOS.org
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; * https://github.com/FreeRTOS
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; *
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; * 1 tab == 4 spaces!
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; */
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.extern pxCurrentTCB
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.extern vTaskSwitchContext
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.extern ulMaxSyscallInterruptPriorityConst
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.global _vector_14
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.global _lc_ref__vector_pp_14
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.global SVC_Handler
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.global vPortStartFirstTask
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.global vPortEnableVFP
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.global ulPortSetInterruptMask
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.global vPortClearInterruptMask
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;-----------------------------------------------------------
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.section .text
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.thumb
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.align 4
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_vector_14: .type func
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mrs r0, psp
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isb
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;Get the location of the current TCB.
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ldr.w r3, =pxCurrentTCB
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ldr r2, [r3]
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;Is the task using the FPU context? If so, push high vfp registers.
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tst r14, #0x10
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it eq
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vstmdbeq r0!, {s16-s31}
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;Save the core registers.
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stmdb r0!, {r4-r11, r14}
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;Save the new top of stack into the first member of the TCB.
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str r0, [r2]
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stmdb sp!, {r0, r3}
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ldr.w r0, =ulMaxSyscallInterruptPriorityConst
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ldr r0, [r0]
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msr basepri, r0
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp!, {r0, r3}
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;The first item in pxCurrentTCB is the task top of stack.
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ldr r1, [r3]
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ldr r0, [r1]
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;Pop the core registers.
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ldmia r0!, {r4-r11, r14}
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;Is the task using the FPU context? If so, pop the high vfp registers too.
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tst r14, #0x10
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it eq
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vldmiaeq r0!, {s16-s31}
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msr psp, r0
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isb
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bx r14
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.size _vector_14, $-_vector_14
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.endsec
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;-----------------------------------------------------------
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; This function is an XMC4000 silicon errata workaround. It will get used when
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; the SILICON_BUG_PMC_CM_001 linker macro is defined.
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.section .text
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.thumb
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.align 4
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_lc_ref__vector_pp_14: .type func
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mrs r0, psp
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isb
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;Get the location of the current TCB.
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ldr.w r3, =pxCurrentTCB
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ldr r2, [r3]
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;Is the task using the FPU context? If so, push high vfp registers.
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tst r14, #0x10
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it eq
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vstmdbeq r0!, {s16-s31}
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;Save the core registers.
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stmdb r0!, {r4-r11, r14}
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;Save the new top of stack into the first member of the TCB.
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str r0, [r2]
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stmdb sp!, {r3}
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ldr.w r0, =ulMaxSyscallInterruptPriorityConst
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ldr r0, [r0]
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msr basepri, r0
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp!, {r3}
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;The first item in pxCurrentTCB is the task top of stack.
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ldr r1, [r3]
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ldr r0, [r1]
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;Pop the core registers.
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ldmia r0!, {r4-r11, r14}
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;Is the task using the FPU context? If so, pop the high vfp registers too.
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tst r14, #0x10
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it eq
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vldmiaeq r0!, {s16-s31}
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msr psp, r0
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isb
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push { lr }
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pop { pc } ; XMC4000 specific errata workaround. Do not used "bx lr" here.
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.size _lc_ref__vector_pp_14, $-_lc_ref__vector_pp_14
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.endsec
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;-----------------------------------------------------------
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.section .text
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.thumb
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.align 4
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SVC_Handler: .type func
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;Get the location of the current TCB.
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ldr.w r3, =pxCurrentTCB
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ldr r1, [r3]
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ldr r0, [r1]
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;Pop the core registers.
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ldmia r0!, {r4-r11, r14}
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msr psp, r0
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isb
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mov r0, #0
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msr basepri, r0
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bx r14
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.size SVC_Handler, $-SVC_Handler
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.endsec
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;-----------------------------------------------------------
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.section .text
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.thumb
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.align 4
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vPortStartFirstTask .type func
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;Use the NVIC offset register to locate the stack.
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ldr.w r0, =0xE000ED08
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ldr r0, [r0]
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ldr r0, [r0]
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;Set the msp back to the start of the stack.
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msr msp, r0
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;Call SVC to start the first task.
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cpsie i
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cpsie f
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dsb
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isb
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svc 0
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.size vPortStartFirstTask, $-vPortStartFirstTask
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.endsec
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;-----------------------------------------------------------
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.section .text
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.thumb
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.align 4
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vPortEnableVFP .type func
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;The FPU enable bits are in the CPACR.
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ldr.w r0, =0xE000ED88
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ldr r1, [r0]
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;Enable CP10 and CP11 coprocessors, then save back.
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orr r1, r1, #( 0xf << 20 )
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str r1, [r0]
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bx r14
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.size vPortEnableVFP, $-vPortEnableVFP
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.endsec
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;-----------------------------------------------------------
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.section .text
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.thumb
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.align 4
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ulPortSetInterruptMask:
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mrs r0, basepri
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ldr.w r1, =ulMaxSyscallInterruptPriorityConst
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ldr r1, [r1]
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msr basepri, r1
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bx r14
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.size ulPortSetInterruptMask, $-ulPortSetInterruptMask
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.endsec
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;-----------------------------------------------------------
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.section .text
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.thumb
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.align 4
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vPortClearInterruptMask:
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msr basepri, r0
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bx r14
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.size vPortClearInterruptMask, $-vPortClearInterruptMask
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.endsec
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;-----------------------------------------------------------
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.end
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