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120 lines
4.7 KiB
C
120 lines
4.7 KiB
C
/*******************************************************************************
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* (c) Copyright 2016-2017 Microsemi Corporation. All rights reserved.
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*
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* Platform definitions
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* Version based on requirements of RISCV-HAL
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*
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* SVN $Revision: 9587 $
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* SVN $Date: 2017-11-16 12:53:31 +0530 (Thu, 16 Nov 2017) $
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*/
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/*=========================================================================*//**
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@mainpage Sample file detailing how hw_platform.h should be constructed for
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the Mi-V processors.
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@section intro_sec Introduction
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The hw_platform.h is to be located in the project root directory.
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Currently this file must be hand crafted when using the Mi-V Soft Processor.
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You can use this file as sample.
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Rename this file from sample_hw_platform.h to hw_platform.h and store it in
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the root folder of your project. Then customize it per your HW design.
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@section driver_configuration Project configuration Instructions
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1. Change SYS_CLK_FREQ define to frequency of Mi-V Soft processor clock
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2 Add all other core BASE addresses
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3. Add peripheral Core Interrupt to Mi-V Soft processor interrupt mappings
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4. Define MSCC_STDIO_UART_BASE_ADDR if you want a CoreUARTapb mapped to STDIO
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*//*=========================================================================*/
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#ifndef HW_PLATFORM_H
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#define HW_PLATFORM_H
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/***************************************************************************//**
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* Soft-processor clock definition
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* This is the only clock brought over from the Mi-V Soft processor Libero design.
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*/
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#ifndef SYS_CLK_FREQ
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#define SYS_CLK_FREQ 70000000UL
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#endif
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/***************************************************************************//**
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* Non-memory Peripheral base addresses
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* Format of define is:
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* <corename>_<instance>_BASE_ADDR
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*/
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#define COREUARTAPB0_BASE_ADDR 0x70001000UL
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#define COREGPIO_IN_BASE_ADDR 0x70002000UL
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#define CORETIMER0_BASE_ADDR 0x70003000UL
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#define CORETIMER1_BASE_ADDR 0x70004000UL
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#define COREGPIO_OUT_BASE_ADDR 0x70005000UL
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#define FLASH_CORE_SPI_BASE 0x70006000UL
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#define CORE16550_BASE_ADDR 0x70007000UL
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/***************************************************************************//**
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* Peripheral Interrupts are mapped to the corresponding Mi-V Soft processor
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* interrupt from the Libero design.
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* There can be up to 31 external interrupts (IRQ[30:0] pins) on the Mi-V Soft
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* processor.The Mi-V Soft processor external interrupts are defined in the
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* riscv_plic.h
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* These are of the form
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* typedef enum
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{
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NoInterrupt_IRQn = 0,
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External_1_IRQn = 1,
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External_2_IRQn = 2,
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.
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.
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.
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External_31_IRQn = 31
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} IRQn_Type;
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The interrupt 0 on RISC-V processor is not used. The pin IRQ[0] should map to
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External_1_IRQn likewise IRQ[30] should map to External_31_IRQn
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* Format of define is:
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* <corename>_<instance>_<core interrupt name>
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*/
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#define TIMER0_IRQn External_30_IRQn
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#define TIMER1_IRQn External_31_IRQn
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/****************************************************************************
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* Baud value to achieve a 115200 baud rate with a 83MHz system clock.
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* This value is calculated using the following equation:
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* BAUD_VALUE = (CLOCK / (16 * BAUD_RATE)) - 1
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*****************************************************************************/
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#define BAUD_VALUE_115200 (SYS_CLK_FREQ / (16 * 115200)) - 1
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/***************************************************************************//**
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* User edit section- Edit sections below if required
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*/
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#ifdef MSCC_STDIO_THRU_CORE_UART_APB
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/*
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* A base address mapping for the STDIO printf/scanf mapping to CortUARTapb
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* must be provided if it is being used
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*
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* e.g. #define MSCC_STDIO_UART_BASE_ADDR COREUARTAPB1_BASE_ADDR
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*/
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#define MSCC_STDIO_UART_BASE_ADDR COREUARTAPB0_BASE_ADDR
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#ifndef MSCC_STDIO_UART_BASE_ADDR
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#error MSCC_STDIO_UART_BASE_ADDR not defined- e.g. #define MSCC_STDIO_UART_BASE_ADDR COREUARTAPB1_BASE_ADDR
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#endif
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#ifndef MSCC_STDIO_BAUD_VALUE
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/*
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* The MSCC_STDIO_BAUD_VALUE define should be set in your project's settings to
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* specify the baud value used by the standard output CoreUARTapb instance for
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* generating the UART's baud rate if you want a different baud rate from the
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* default of 115200 baud
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*/
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#define MSCC_STDIO_BAUD_VALUE 115200
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#endif /*MSCC_STDIO_BAUD_VALUE*/
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#endif /* end of MSCC_STDIO_THRU_CORE_UART_APB */
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/*******************************************************************************
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* End of user edit section
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*/
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#endif /* HW_PLATFORM_H */
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