FreeRTOS-Kernel/FreeRTOS/Demo/RISC-V_RV32_SiFive_HiFive1-RevB_FreedomStudio/bsp
Gaurav-Aggarwal-AWS 2fedeff332
Update BSP and SDK for HiFive board (#645)
* Update BSP and SDK for HiFive board

This commit also adds demo start and success/failure output messages.
2021-07-15 18:40:22 -07:00
..
install/include/metal Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
core.dts Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
design.dts Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
design.reglist Rename RISC-V_RV32_SiFive_HiFive1-FreedomStudio directory to RISC-V_RV32_SiFive_HiFive1-RevB-FreedomStudio as it targets Rev B of the hardware. 2020-01-01 22:05:35 +00:00
design.svd Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal-inline.h Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal-platform.h Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal.default.lds Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal.freertos.lds Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal.h Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal.ramrodata.lds Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
metal.scratchpad.lds Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
README.md Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00
settings.mk Update BSP and SDK for HiFive board (#645) 2021-07-15 18:40:22 -07:00

HiFive1 Rev B is a low-cost, Arduino-compatible development board featuring the Freedom E310. Its the best way to start prototyping and developing your RISCV applications.

This target is ideal for getting familiar with the RISC-V ISA instruction set and the freedom-metal libraries. It supports:

  • 1 hart with RV32IMAC core
  • 4 hardware breakpoints
  • Physical Memory Protection with 8 regions
  • 16 local interrupts signal that can be connected to off core complex devices
  • Up to 127 PLIC interrupt signals that can be connected to off core complex devices, with 7 priority levels
  • GPIO memory with 16 interrupt lines
  • SPI memory with 1 interrupt line
  • Serial port with 1 interrupt line
  • 1 RGB LEDS