FreeRTOS-Kernel/FreeRTOS/Demo/RISC-V-spike-htif_GCC
johnrhen 43defa566c
Apply release changes to main branch (#759)
* Update History.txt and README.md for December release (#744)

* Update History.txt and README.md for release

* Bump mbedtls submodule to v2.28.0 (#745)

* Patch project files for mbedtls (#751)

* Apply group 1 patches

* Apply patches for group 2

* Update project files for mbedTLS new version

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix warnings in projects

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

* Fix warnings in HTTP_S3_Download demo

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>

Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>

* Update changelog and history for corePKCS11 update (#752)

* Update submodule pointer and manifest.yml for corePKCS11 (#754)

* Update readme and history.txt to show that Sigv4 is a newly added library (#756)

* Revert update to v143 of VS toolset (#757)

* [AUTO][RELEASE]: Bump file header version to "202112.00"

* Update file headers to satisfy core checks

Co-authored-by: Muneeb Ahmed <54290492+muneebahmed10@users.noreply.github.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: johnrhen <johnrhen@users.noreply.github.com>
2021-12-23 10:16:27 -08:00
..
fake_rom.lds Small RISC-V spike demo improvements (#554) 2021-04-08 15:03:10 -07:00
FreeRTOSConfig.h Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00
htif.c Add RISC-V demo for the spike simulator. (#532) 2021-04-02 14:17:53 -07:00
htif.h Add RISC-V demo for the spike simulator. (#532) 2021-04-02 14:17:53 -07:00
main.c Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00
main_blinky.c Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00
Makefile Small RISC-V spike demo improvements (#554) 2021-04-08 15:03:10 -07:00
README.md Small RISC-V spike demo improvements (#554) 2021-04-08 15:03:10 -07:00
riscv-reg.h Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00
riscv-virt.c Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00
riscv-virt.h Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00
spike-1.cfg Add RISC-V demo for the spike simulator. (#532) 2021-04-02 14:17:53 -07:00
start.S Apply release changes to main branch (#759) 2021-12-23 10:16:27 -08:00

Emulating generic RISC-V 32bit machine on spike

Requirements

  1. GNU RISC-V toolchains (tested on Crosstool-NG)
  2. spike from https://github.com/riscv/riscv-isa-sim
  3. OpenOCD from https://github.com/riscv/riscv-openocd

How to build toolchain

Clone the Crosstool-NG and build.

$ git clone https://github.com/crosstool-ng/crosstool-ng
$ cd crosstool-ng
$ ./bootstrap
$ ./configure --enable-local
$ make
$ ./ct-ng menuconfig

For RV32 builds, change the following configs:

CT_EXPERIMENTAL=y
CT_ARCH_RISCV=y
CT_ARCH_64=n
CT_ARCH_ARCH=rv32ima
CT_ARCH_ABI=ilp32
CT_TARGET_CFLAGS="-mcmodel=medany"
CT_TARGET_LDFLAGS="-mcmodel=medany"
CT_MULTILIB=y
CT_DEBUG_GDB=y

For RV64 builds, change the following configs:

CT_EXPERIMENTAL=y
CT_ARCH_RISCV=y
CT_ARCH_64=y
CT_ARCH_ARCH=rv32ima
CT_ARCH_ABI=ilp32
CT_TARGET_CFLAGS="-mcmodel=medany"
CT_TARGET_LDFLAGS="-mcmodel=medany"
CT_MULTILIB=y
CT_DEBUG_GDB=y

Build the GNU toolchain for RISC-V.

$ ./ct-ng build

A toolchain is installed at ~/x-tools/riscv64-unknown-elf directory.

How to build

Add path of toolchain that is described above section.

$ export PATH=~/x-tools/riscv64-unknown-elf/bin:$PATH

To build, simply run make. If you want a debug build, pass DEBUG=1. If you want an RV64 build, pass XLEN=64.

The resulting executable file is ./build/RTOSDemo32.axf or ./build/RTOSDemo64.axf.

How to run

RV32:

$ spike -p1 --isa RV32IMA -m0x80000000:0x10000000 --rbb-port 9824 \
        ./build/RTOSDemo32.axf

RV64:

$ spike -p1 --isa RV64IMA -m0x80000000:0x10000000 --rbb-port 9824 \
        ./build/RTOSDemo64.axf

How to debug with gdb

Start OpenOCD in one terminal:

$ openocd -f spike-1.cfg

Start gdb in another:

$ riscv64-unknown-elf-gdb ./build/RTOSDemo.axf
...
(gdb) target extended-remote localhost:3333
...
(gdb) info threads

(As of 3/22/2021 OpenOCD's RISC-V FreeRTOS awareness is still incomplete.)

Description

This demo starts separate transmit and receive threads. The transmit thread sends integers through a queue. Both threads print out what they're sending/receiving using HTIF.