mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-05-02 03:12:05 -04:00
989bc332b2
* Add XMOS XCore ports Some minor modifications are also made to the kernel to support the XCore compiler's automatic stack size calculation. * Update kernel to support SMP The XMOS XCore ports are also updated to support SMP. * Fix compiler warnings in xcore ports The port set and clear interrupt mask from ISR macros were removed from the ports so that the default macros found in FreeRTOS.h are used instead. The default macros do not result in warnings when they are used. * Remove inline function from timers.h Inline function converted to macro. This should now build when optimizations are off and inlining is disabled. * Fix compiler warnings in xcore ports and tasks.c * fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() * spelling fixes for tasks.c Co-authored-by: Michael Bruno <mikeb@xmos.com>
334 lines
10 KiB
C
334 lines
10 KiB
C
/*
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* FreeRTOS Kernel V10.4.3
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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* 1 tab == 4 spaces!
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*/
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/*
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Changes from V4.2.1
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+ Introduced the configKERNEL_INTERRUPT_PRIORITY definition.
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the PIC24 port.
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*----------------------------------------------------------*/
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/* Scheduler include files. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Hardware specifics. */
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#define portBIT_SET 1
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#define portTIMER_PRESCALE 8
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#define portINITIAL_SR 0
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/* Defined for backward compatability with project created prior to
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FreeRTOS.org V4.3.0. */
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#ifndef configKERNEL_INTERRUPT_PRIORITY
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#define configKERNEL_INTERRUPT_PRIORITY 1
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#endif
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/* Use _T1Interrupt as the interrupt handler name if the application writer has
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not provided their own. */
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#ifndef configTICK_INTERRUPT_HANDLER
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#define configTICK_INTERRUPT_HANDLER _T1Interrupt
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#endif /* configTICK_INTERRUPT_HANDLER */
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/* The program counter is only 23 bits. */
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#define portUNUSED_PR_BITS 0x7f
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/* Records the nesting depth of calls to portENTER_CRITICAL(). */
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UBaseType_t uxCriticalNesting = 0xef;
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#if configKERNEL_INTERRUPT_PRIORITY != 1
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#error If configKERNEL_INTERRUPT_PRIORITY is not 1 then the #32 in the following macros needs changing to equal the portINTERRUPT_BITS value, which is ( configKERNEL_INTERRUPT_PRIORITY << 5 )
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#endif
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#if defined( __PIC24E__ ) || defined ( __PIC24F__ ) || defined( __PIC24FK__ ) || defined( __PIC24H__ )
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#ifdef __HAS_EDS__
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#define portRESTORE_CONTEXT() \
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asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
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"MOV W0, _uxCriticalNesting \n" \
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"POP DSWPAG \n" \
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"POP DSRPAG \n" \
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"POP CORCON \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n" /* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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"POP SR " );
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#else /* __HAS_EDS__ */
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#define portRESTORE_CONTEXT() \
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asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
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"MOV W0, _uxCriticalNesting \n" \
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"POP PSVPAG \n" \
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"POP CORCON \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n" /* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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"POP SR " );
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#endif /* __HAS_EDS__ */
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#endif /* MPLAB_PIC24_PORT */
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#if defined( __dsPIC30F__ ) || defined( __dsPIC33F__ )
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#define portRESTORE_CONTEXT() \
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asm volatile( "MOV _pxCurrentTCB, W0 \n" /* Restore the stack pointer for the task. */ \
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"MOV [W0], W15 \n" \
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"POP W0 \n" /* Restore the critical nesting counter for the task. */ \
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"MOV W0, _uxCriticalNesting \n" \
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"POP PSVPAG \n" \
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"POP CORCON \n" \
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"POP DOENDH \n" \
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"POP DOENDL \n" \
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"POP DOSTARTH \n" \
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"POP DOSTARTL \n" \
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"POP DCOUNT \n" \
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"POP ACCBU \n" \
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"POP ACCBH \n" \
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"POP ACCBL \n" \
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"POP ACCAU \n" \
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"POP ACCAH \n" \
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"POP ACCAL \n" \
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"POP TBLPAG \n" \
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"POP RCOUNT \n" /* Restore the registers from the stack. */ \
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"POP W14 \n" \
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"POP.D W12 \n" \
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"POP.D W10 \n" \
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"POP.D W8 \n" \
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"POP.D W6 \n" \
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"POP.D W4 \n" \
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"POP.D W2 \n" \
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"POP.D W0 \n" \
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"POP SR " );
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#endif /* MPLAB_DSPIC_PORT */
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#ifndef portRESTORE_CONTEXT
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#error Unrecognised device selected
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/* Note: dsPIC parts with EDS are not supported as there is no easy way to
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recover the hardware stacked copies for DOCOUNT, DOHIGH, DOLOW. */
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#endif
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/*
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* Setup the timer used to generate the tick interrupt.
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*/
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void vApplicationSetupTickTimerInterrupt( void );
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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uint16_t usCode;
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UBaseType_t i;
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const StackType_t xInitialStack[] =
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{
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0x1111, /* W1 */
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0x2222, /* W2 */
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0x3333, /* W3 */
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0x4444, /* W4 */
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0x5555, /* W5 */
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0x6666, /* W6 */
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0x7777, /* W7 */
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0x8888, /* W8 */
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0x9999, /* W9 */
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0xaaaa, /* W10 */
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0xbbbb, /* W11 */
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0xcccc, /* W12 */
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0xdddd, /* W13 */
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0xeeee, /* W14 */
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0xcdce, /* RCOUNT */
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0xabac, /* TBLPAG */
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/* dsPIC specific registers. */
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#ifdef MPLAB_DSPIC_PORT
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0x0202, /* ACCAL */
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0x0303, /* ACCAH */
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0x0404, /* ACCAU */
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0x0505, /* ACCBL */
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0x0606, /* ACCBH */
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0x0707, /* ACCBU */
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0x0808, /* DCOUNT */
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0x090a, /* DOSTARTL */
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0x1010, /* DOSTARTH */
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0x1110, /* DOENDL */
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0x1212, /* DOENDH */
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#endif
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};
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/* Setup the stack as if a yield had occurred.
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Save the low bytes of the program counter. */
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usCode = ( uint16_t ) pxCode;
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*pxTopOfStack = ( StackType_t ) usCode;
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pxTopOfStack++;
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/* Save the high byte of the program counter. This will always be zero
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here as it is passed in a 16bit pointer. If the address is greater than
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16 bits then the pointer will point to a jump table. */
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*pxTopOfStack = ( StackType_t ) 0;
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pxTopOfStack++;
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/* Status register with interrupts enabled. */
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*pxTopOfStack = portINITIAL_SR;
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pxTopOfStack++;
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/* Parameters are passed in W0. */
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*pxTopOfStack = ( StackType_t ) pvParameters;
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pxTopOfStack++;
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for( i = 0; i < ( sizeof( xInitialStack ) / sizeof( StackType_t ) ); i++ )
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{
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*pxTopOfStack = xInitialStack[ i ];
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pxTopOfStack++;
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}
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*pxTopOfStack = CORCON;
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pxTopOfStack++;
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#if defined(__HAS_EDS__)
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*pxTopOfStack = DSRPAG;
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pxTopOfStack++;
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*pxTopOfStack = DSWPAG;
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pxTopOfStack++;
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#else /* __HAS_EDS__ */
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*pxTopOfStack = PSVPAG;
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pxTopOfStack++;
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#endif /* __HAS_EDS__ */
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/* Finally the critical nesting depth. */
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*pxTopOfStack = 0x00;
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pxTopOfStack++;
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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BaseType_t xPortStartScheduler( void )
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{
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/* Setup a timer for the tick ISR. */
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vApplicationSetupTickTimerInterrupt();
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/* Restore the context of the first task to run. */
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portRESTORE_CONTEXT();
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/* Simulate the end of the yield function. */
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asm volatile ( "return" );
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/* Should not reach here. */
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return pdTRUE;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup a timer for a regular tick.
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*/
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__attribute__(( weak )) void vApplicationSetupTickTimerInterrupt( void )
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{
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const uint32_t ulCompareMatch = ( ( configCPU_CLOCK_HZ / portTIMER_PRESCALE ) / configTICK_RATE_HZ ) - 1;
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/* Prescale of 8. */
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T1CON = 0;
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TMR1 = 0;
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PR1 = ( uint16_t ) ulCompareMatch;
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/* Setup timer 1 interrupt priority. */
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IPC0bits.T1IP = configKERNEL_INTERRUPT_PRIORITY;
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/* Clear the interrupt as a starting condition. */
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IFS0bits.T1IF = 0;
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/* Enable the interrupt. */
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IEC0bits.T1IE = 1;
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/* Setup the prescale value. */
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T1CONbits.TCKPS0 = 1;
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T1CONbits.TCKPS1 = 0;
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/* Start the timer. */
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T1CONbits.TON = 1;
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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configASSERT( uxCriticalNesting );
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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void __attribute__((__interrupt__, auto_psv)) configTICK_INTERRUPT_HANDLER( void )
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{
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/* Clear the timer interrupt. */
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IFS0bits.T1IF = 0;
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if( xTaskIncrementTick() != pdFALSE )
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{
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portYIELD();
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}
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}
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