mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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989bc332b2
* Add XMOS XCore ports Some minor modifications are also made to the kernel to support the XCore compiler's automatic stack size calculation. * Update kernel to support SMP The XMOS XCore ports are also updated to support SMP. * Fix compiler warnings in xcore ports The port set and clear interrupt mask from ISR macros were removed from the ports so that the default macros found in FreeRTOS.h are used instead. The default macros do not result in warnings when they are used. * Remove inline function from timers.h Inline function converted to macro. This should now build when optimizations are off and inlining is disabled. * Fix compiler warnings in xcore ports and tasks.c * fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() * spelling fixes for tasks.c Co-authored-by: Michael Bruno <mikeb@xmos.com>
418 lines
12 KiB
C
418 lines
12 KiB
C
/*
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* FreeRTOS Kernel V10.4.3
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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/**
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* @file atomic.h
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* @brief FreeRTOS atomic operation support.
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*
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* This file implements atomic functions by disabling interrupts globally.
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* Implementations with architecture specific atomic instructions can be
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* provided under each compiler directory.
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*/
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#ifndef ATOMIC_H
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#define ATOMIC_H
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#ifndef INC_FREERTOS_H
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#error "include FreeRTOS.h must appear in source files before include atomic.h"
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#endif
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/* Standard includes. */
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#include <stdint.h>
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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/*
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* Port specific definitions -- entering/exiting critical section.
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* Refer template -- ./lib/FreeRTOS/portable/Compiler/Arch/portmacro.h
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*
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* Every call to ATOMIC_EXIT_CRITICAL() must be closely paired with
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* ATOMIC_ENTER_CRITICAL().
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*
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*/
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#if defined( portSET_INTERRUPT_MASK_FROM_ISR )
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/* Nested interrupt scheme is supported in this port. */
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#define ATOMIC_ENTER_CRITICAL() \
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UBaseType_t uxCriticalSectionType = portSET_INTERRUPT_MASK_FROM_ISR()
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#define ATOMIC_EXIT_CRITICAL() \
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portCLEAR_INTERRUPT_MASK_FROM_ISR( uxCriticalSectionType )
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#else
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/* Nested interrupt scheme is NOT supported in this port. */
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#define ATOMIC_ENTER_CRITICAL() portENTER_CRITICAL()
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#define ATOMIC_EXIT_CRITICAL() portEXIT_CRITICAL()
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#endif /* portSET_INTERRUPT_MASK_FROM_ISR() */
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/*
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* Port specific definition -- "always inline".
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* Inline is compiler specific, and may not always get inlined depending on your
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* optimization level. Also, inline is considered as performance optimization
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* for atomic. Thus, if portFORCE_INLINE is not provided by portmacro.h,
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* instead of resulting error, simply define it away.
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*/
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#ifndef portFORCE_INLINE
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#define portFORCE_INLINE
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#endif
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#define ATOMIC_COMPARE_AND_SWAP_SUCCESS 0x1U /**< Compare and swap succeeded, swapped. */
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#define ATOMIC_COMPARE_AND_SWAP_FAILURE 0x0U /**< Compare and swap failed, did not swap. */
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/*----------------------------- Swap && CAS ------------------------------*/
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/**
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* Atomic compare-and-swap
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*
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* @brief Performs an atomic compare-and-swap operation on the specified values.
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*
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* @param[in, out] pulDestination Pointer to memory location from where value is
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* to be loaded and checked.
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* @param[in] ulExchange If condition meets, write this value to memory.
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* @param[in] ulComparand Swap condition.
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*
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* @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
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*
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* @note This function only swaps *pulDestination with ulExchange, if previous
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* *pulDestination value equals ulComparand.
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*/
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static portFORCE_INLINE uint32_t Atomic_CompareAndSwap_u32( uint32_t volatile * pulDestination,
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uint32_t ulExchange,
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uint32_t ulComparand )
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{
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uint32_t ulReturnValue;
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ATOMIC_ENTER_CRITICAL();
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{
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if( *pulDestination == ulComparand )
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{
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*pulDestination = ulExchange;
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
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}
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else
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{
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
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}
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}
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ATOMIC_EXIT_CRITICAL();
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return ulReturnValue;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic swap (pointers)
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*
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* @brief Atomically sets the address pointed to by *ppvDestination to the value
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* of *pvExchange.
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*
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* @param[in, out] ppvDestination Pointer to memory location from where a pointer
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* value is to be loaded and written back to.
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* @param[in] pvExchange Pointer value to be written to *ppvDestination.
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*
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* @return The initial value of *ppvDestination.
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*/
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static portFORCE_INLINE void * Atomic_SwapPointers_p32( void * volatile * ppvDestination,
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void * pvExchange )
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{
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void * pReturnValue;
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ATOMIC_ENTER_CRITICAL();
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{
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pReturnValue = *ppvDestination;
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*ppvDestination = pvExchange;
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}
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ATOMIC_EXIT_CRITICAL();
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return pReturnValue;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic compare-and-swap (pointers)
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*
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* @brief Performs an atomic compare-and-swap operation on the specified pointer
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* values.
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*
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* @param[in, out] ppvDestination Pointer to memory location from where a pointer
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* value is to be loaded and checked.
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* @param[in] pvExchange If condition meets, write this value to memory.
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* @param[in] pvComparand Swap condition.
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*
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* @return Unsigned integer of value 1 or 0. 1 for swapped, 0 for not swapped.
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*
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* @note This function only swaps *ppvDestination with pvExchange, if previous
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* *ppvDestination value equals pvComparand.
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*/
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static portFORCE_INLINE uint32_t Atomic_CompareAndSwapPointers_p32( void * volatile * ppvDestination,
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void * pvExchange,
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void * pvComparand )
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{
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uint32_t ulReturnValue = ATOMIC_COMPARE_AND_SWAP_FAILURE;
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ATOMIC_ENTER_CRITICAL();
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{
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if( *ppvDestination == pvComparand )
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{
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*ppvDestination = pvExchange;
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ulReturnValue = ATOMIC_COMPARE_AND_SWAP_SUCCESS;
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}
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}
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ATOMIC_EXIT_CRITICAL();
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return ulReturnValue;
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}
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/*----------------------------- Arithmetic ------------------------------*/
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/**
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* Atomic add
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*
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* @brief Atomically adds count to the value of the specified pointer points to.
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*
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* @param[in,out] pulAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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* @param[in] ulCount Value to be added to *pulAddend.
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*
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* @return previous *pulAddend value.
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*/
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static portFORCE_INLINE uint32_t Atomic_Add_u32( uint32_t volatile * pulAddend,
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uint32_t ulCount )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulAddend;
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*pulAddend += ulCount;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic subtract
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*
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* @brief Atomically subtracts count from the value of the specified pointer
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* pointers to.
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*
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* @param[in,out] pulAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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* @param[in] ulCount Value to be subtract from *pulAddend.
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*
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* @return previous *pulAddend value.
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*/
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static portFORCE_INLINE uint32_t Atomic_Subtract_u32( uint32_t volatile * pulAddend,
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uint32_t ulCount )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulAddend;
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*pulAddend -= ulCount;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic increment
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*
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* @brief Atomically increments the value of the specified pointer points to.
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*
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* @param[in,out] pulAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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*
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* @return *pulAddend value before increment.
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*/
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static portFORCE_INLINE uint32_t Atomic_Increment_u32( uint32_t volatile * pulAddend )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulAddend;
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*pulAddend += 1;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic decrement
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*
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* @brief Atomically decrements the value of the specified pointer points to
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*
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* @param[in,out] pulAddend Pointer to memory location from where value is to be
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* loaded and written back to.
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*
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* @return *pulAddend value before decrement.
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*/
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static portFORCE_INLINE uint32_t Atomic_Decrement_u32( uint32_t volatile * pulAddend )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulAddend;
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*pulAddend -= 1;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*----------------------------- Bitwise Logical ------------------------------*/
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/**
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* Atomic OR
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*
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* @brief Performs an atomic OR operation on the specified values.
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*
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* @param [in, out] pulDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be ORed with *pulDestination.
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*
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* @return The original value of *pulDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_OR_u32( uint32_t volatile * pulDestination,
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uint32_t ulValue )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulDestination;
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*pulDestination |= ulValue;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic AND
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*
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* @brief Performs an atomic AND operation on the specified values.
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*
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* @param [in, out] pulDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be ANDed with *pulDestination.
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*
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* @return The original value of *pulDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_AND_u32( uint32_t volatile * pulDestination,
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uint32_t ulValue )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulDestination;
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*pulDestination &= ulValue;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic NAND
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*
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* @brief Performs an atomic NAND operation on the specified values.
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*
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* @param [in, out] pulDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be NANDed with *pulDestination.
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*
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* @return The original value of *pulDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_NAND_u32( uint32_t volatile * pulDestination,
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uint32_t ulValue )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulDestination;
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*pulDestination = ~( ulCurrent & ulValue );
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/*-----------------------------------------------------------*/
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/**
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* Atomic XOR
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*
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* @brief Performs an atomic XOR operation on the specified values.
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*
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* @param [in, out] pulDestination Pointer to memory location from where value is
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* to be loaded and written back to.
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* @param [in] ulValue Value to be XORed with *pulDestination.
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*
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* @return The original value of *pulDestination.
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*/
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static portFORCE_INLINE uint32_t Atomic_XOR_u32( uint32_t volatile * pulDestination,
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uint32_t ulValue )
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{
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uint32_t ulCurrent;
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ATOMIC_ENTER_CRITICAL();
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{
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ulCurrent = *pulDestination;
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*pulDestination ^= ulValue;
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}
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ATOMIC_EXIT_CRITICAL();
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return ulCurrent;
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}
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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}
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#endif
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/* *INDENT-ON* */
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#endif /* ATOMIC_H */
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