mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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349 lines
14 KiB
C
349 lines
14 KiB
C
/*
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FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?". Have you defined configASSERT()? *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* Investing in training allows your team to be as productive as *
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* possible as early as possible, lowering your overall development *
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* cost, and enabling you to bring a more robust product to market *
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* earlier than would otherwise be possible. Richard Barry is both *
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* the architect and key author of FreeRTOS, and so also the world's *
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* leading authority on what is the world's most popular real time *
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* kernel for deeply embedded MCU designs. Obtaining your training *
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* from Richard ensures your team will gain directly from his in-depth *
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* product knowledge and years of usage experience. Contact Real Time *
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* Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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* by Richard Barry: http://www.FreeRTOS.org/contact
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* *
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***************************************************************************
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***************************************************************************
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* *
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* You are receiving this top quality software for free. Please play *
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* fair and reciprocate by reporting any suspected issues and *
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* participating in the community forum: *
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* http://www.FreeRTOS.org/support *
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* *
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* Thank you! *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/*
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* The register test task as described in the comments at the top of main-full.c.
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*/
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void vRegisterTest1( void *pvParameters );
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void vRegisterTest2( void *pvParameters );
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/* Variables that are incremented on each iteration of the reg test tasks -
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provided the tasks have not reported any errors. The check timer inspects these
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variables to ensure they are still incrementing as expected. If a variable
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stops incrementing then it is likely that its associate task has stalled or
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detected an error. */
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volatile unsigned long ulRegTest1CycleCount = 0UL, ulRegTest2CycleCount = 0UL;
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/*-----------------------------------------------------------*/
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void vRegisterTest1( void *pvParameters )
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{
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/* This task uses an infinite loop that is implemented in the assembly
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code.
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First fill the relevant registers with known values. */
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asm volatile ( " addi r3, r0, 3 \n\t" \
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" addi r4, r0, 4 \n\t" \
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" addi r6, r0, 6 \n\t" \
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" addi r7, r0, 7 \n\t" \
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" addi r8, r0, 8 \n\t" \
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" addi r9, r0, 9 \n\t" \
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" addi r10, r0, 10 \n\t" \
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" addi r11, r0, 11 \n\t" \
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" addi r12, r0, 12 \n\t" \
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" addi r16, r0, 16 \n\t" \
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" addi r19, r0, 19 \n\t" \
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" addi r20, r0, 20 \n\t" \
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" addi r21, r0, 21 \n\t" \
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" addi r22, r0, 22 \n\t" \
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" addi r23, r0, 23 \n\t" \
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" addi r24, r0, 24 \n\t" \
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" addi r25, r0, 25 \n\t" \
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" addi r26, r0, 26 \n\t" \
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" addi r27, r0, 27 \n\t" \
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" addi r28, r0, 28 \n\t" \
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" addi r29, r0, 29 \n\t" \
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" addi r30, r0, 30 \n\t" \
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" addi r31, r0, 31 \n\t"
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);
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/* Now test the register values to ensure they contain the same value that
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was written to them above. This task will get preempted frequently so
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other tasks are likely to have executed since the register values were
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written. If any register contains an unexpected value then the task will
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branch to Error_Loop_1, which in turn prevents it from incrementing its
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loop counter, enabling the check timer to determine that all is not as it
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should be. */
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asm volatile ( "Loop_Start_1: \n\t" \
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" xori r18, r3, 3 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r4, 4 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r6, 6 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r7, 7 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r8, 8 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r9, 9 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r10, 10 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r11, 11 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r12, 12 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r16, 16 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r19, 19 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r20, 20 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r21, 21 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r22, 22 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r23, 23 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r24, 24 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r25, 25 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r26, 26 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r27, 27 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r28, 28 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r29, 29 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r30, 30 \n\t" \
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" bnei r18, Error_Loop_1 \n\t" \
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" xori r18, r31, 31 \n\t" \
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" bnei r18, Error_Loop_1 \n\t"
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);
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/* If this task has not branched to the error loop, then everything is ok,
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and the check variable can be incremented to indicate that this task
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is still running. Then, brach back to the top to check the register
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contents again. */
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asm volatile ( " lwi r18, r0, ulRegTest1CycleCount \n\t" \
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" addik r18, r18, 1 \n\t" \
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" swi r18, r0, ulRegTest1CycleCount \n\t" \
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" \n\t" \
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" bri Loop_Start_1 "
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);
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/* The test function will branch here if it discovers an error. This part
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of the code just sits in a NULL loop, which prevents the check variable
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incrementing any further to allow the check timer to recognize that this
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test has failed. */
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asm volatile ( "Error_Loop_1: \n\t" \
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" bri 0 \n\t" \
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" nop \n\t" \
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);
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( void ) pvParameters;
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}
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/*-----------------------------------------------------------*/
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void vRegisterTest2( void *pvParameters )
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{
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/* This task uses an infinite loop that is implemented in the assembly
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code.
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First fill the registers with known values. */
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asm volatile ( " addi r16, r0, 1016 \n\t" \
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" addi r19, r0, 1019 \n\t" \
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" addi r20, r0, 1020 \n\t" \
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" addi r21, r0, 1021 \n\t" \
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" addi r22, r0, 1022 \n\t" \
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" addi r23, r0, 1023 \n\t" \
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" addi r24, r0, 1024 \n\t" \
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" addi r25, r0, 1025 \n\t" \
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" addi r26, r0, 1026 \n\t" \
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" addi r27, r0, 1027 \n\t" \
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" addi r28, r0, 1028 \n\t" \
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" addi r29, r0, 1029 \n\t" \
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" addi r30, r0, 1030 \n\t" \
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" addi r31, r0, 1031 \n\t" \
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" " \
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"Loop_Start_2: "
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);
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/* Unlike vRegisterTest1, vRegisterTest2 performs a yield. This increases
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the test coverage, but does mean volatile registers need re-loading with
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their exepcted values. */
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taskYIELD();
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/* taskYIELD() could have changed temporaries - set them back to those
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expected by the reg test task. */
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asm volatile ( " addi r3, r0, 103 \n\t" \
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" addi r4, r0, 104 \n\t" \
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" addi r6, r0, 106 \n\t" \
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" addi r7, r0, 107 \n\t" \
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" addi r8, r0, 108 \n\t" \
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" addi r9, r0, 109 \n\t" \
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" addi r10, r0, 1010 \n\t" \
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" addi r11, r0, 1011 \n\t" \
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" addi r12, r0, 1012 \n\t" \
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);
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/* Now test the register values to ensure they contain the same value that
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was written to them above. This task will get preempted frequently so
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other tasks are likely to have executed since the register values were
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written. */
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asm volatile ( " xori r18, r3, 103 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r4, 104 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r6, 106 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r7, 107 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r8, 108 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r9, 109 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r10, 1010 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r11, 1011 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r12, 1012 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r16, 1016 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r19, 1019 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r20, 1020 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r21, 1021 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r22, 1022 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r23, 1023 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r24, 1024 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r25, 1025 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r26, 1026 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r27, 1027 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r28, 1028 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r29, 1029 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r30, 1030 \n\t" \
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" bnei r18, Error_Loop_2 \n\t" \
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" xori r18, r31, 1031 \n\t" \
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" bnei r18, Error_Loop_2 \n\t"
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);
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/* If this task has not branched to the error loop, then everything is ok,
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and the check variable should be incremented to indicate that this task
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is still running. Then, brach back to the top to check the registers
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again. */
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asm volatile ( " lwi r18, r0, ulRegTest2CycleCount \n\t" \
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" addik r18, r18, 1 \n\t" \
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" swi r18, r0, ulRegTest2CycleCount \n\t" \
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" \n\t" \
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" bri Loop_Start_2 "
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);
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/* The test function will branch here if it discovers an error. This part
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of the code just sits in a NULL loop, which prevents the check variable
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incrementing any further to allow the check timer to recognize that this
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test has failed. */
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asm volatile ( "Error_Loop_2: \n\t" \
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" bri 0 \n\t" \
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" nop \n\t" \
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);
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( void ) pvParameters;
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}
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