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FreeRTOS-Kernel/portable/GCC/ARM_AARCH64_SRE
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Marouen Ghodhbane 630cfb5b79 portable: aarch64_sre: add the configuration and status registers to the fpu saved context 
FPSR and FPCR are two 64-bits registers where only the lower 32 bits are defined.
Save them when doing context switch with FPU context saving enabled.

Signed-off-by: Marouen Ghodhbane <marouen.ghodhbane@nxp.com>
2025-01-22 17:00:50 -08:00
..
port.c portable: aarch64_sre: add the configuration and status registers to the fpu saved context 2025-01-22 17:00:50 -08:00
portASM.S portable: aarch64_sre: add the configuration and status registers to the fpu saved context 2025-01-22 17:00:50 -08:00
portmacro.h portable: aarch64_sre: add configUSE_TASK_FPU_SUPPORT support 2025-01-22 17:00:50 -08:00
README.md fix typos in comments: interace -> interface, swtich -> switch (#1022) 2024-04-08 17:50:55 -07:00

README.md

Armv8-A architecture support

The Armv8-A architecture introduces the ability to use 64-bit and 32-bit Execution states, known as AArch64 and AArch32 respectively. The AArch64 Execution state supports the A64 instruction set. It holds addresses in 64-bit registers and allows instructions in the base instruction set to use 64-bit registers for their processing.

The AArch32 Execution state is a 32-bit Execution state that preserves backwards compatibility with the Armv7-A architecture, enhancing that profile so that it can support some features included in the AArch64 state. It supports the T32 and A32 instruction sets. Follow the link for more information.

ARM_AARCH64_SRE port

This port adds support for Armv8-A architecture AArch64 execution state. This port is generic and can be used as a starting point for Armv8-A application processors.

  • ARM_AARCH64_SRE
    • System Register interface to access Arm GIC registers