mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-08-19 17:48:33 -04:00
215 lines
5.8 KiB
ArmAsm
215 lines
5.8 KiB
ArmAsm
/*
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* FreeRTOS Kernel V10.2.0
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* Copyright (C) 2019 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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#include <xc.h>
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#include <sys/asm.h>
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.global vRegTest1
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.global vRegTest2
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/* Reg test macro helper. Test a register for a known value branching to
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error_loop if not correct otherwise continuing on */
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.macro portREG_TEST work_reg, test_reg, test_value
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.set micromips
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.set noreorder
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.set noat
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/* Check each register maintains the value assigned to it for the lifetime
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of the task. */
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addiu \work_reg, $0, 0x00
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addiu \work_reg, \test_reg, -\test_value
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beq \work_reg, $0, 1f
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nop
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/* The register value was not that expected. Jump to the error loop so the
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cycle counter stops incrementing. */
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b error_loop
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nop
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1:
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.endm
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.set micromips
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.set noreorder
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.set noat
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.ent error_loop
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/* Reg test tasks call the error loop when they find an error. Sitting in the
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tight error loop prevents them incrementing their ulRegTestnCycles counter, and
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so allows the check softwate timer to know an error has been found. */
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error_loop:
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b error_loop
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nop
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.end error_loop
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.set micromips
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.set noreorder
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.set noat
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.ent vRegTest1
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vRegTest1:
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/* Fill the registers with known values. */
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addiu $1, $0, 0x11
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addiu $2, $0, 0x12
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addiu $3, $0, 0x13
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/* $4 contains the address of the loop counter - don't mess with $4. */
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addiu $5, $0, 0x15
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addiu $6, $0, 0x16
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addiu $7, $0, 0x17
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addiu $8, $0, 0x18
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addiu $9, $0, 0x19
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addiu $10, $0, 0x110
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addiu $11, $0, 0x111
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addiu $12, $0, 0x112
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addiu $13, $0, 0x113
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addiu $14, $0, 0x114
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addiu $15, $0, 0x115
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addiu $16, $0, 0x116
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addiu $17, $0, 0x117
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addiu $18, $0, 0x118
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addiu $19, $0, 0x119
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addiu $20, $0, 0x120
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addiu $21, $0, 0x121
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addiu $23, $0, 0x123
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addiu $24, $0, 0x124
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addiu $25, $0, 0x125
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addiu $30, $0, 0x130
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addiu $22, $0, 0x131
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vRegTest1Loop:
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portREG_TEST $22, $1, 0x11
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portREG_TEST $22, $2, 0x12
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portREG_TEST $22, $3, 0x13
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portREG_TEST $22, $5, 0x15
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portREG_TEST $22, $6, 0x16
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portREG_TEST $22, $7, 0x17
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portREG_TEST $22, $8, 0x18
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portREG_TEST $22, $9, 0x19
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portREG_TEST $22, $10, 0x110
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portREG_TEST $22, $11, 0x111
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portREG_TEST $22, $12, 0x112
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portREG_TEST $22, $13, 0x113
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portREG_TEST $22, $14, 0x114
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portREG_TEST $22, $15, 0x115
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portREG_TEST $22, $16, 0x116
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portREG_TEST $22, $17, 0x117
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portREG_TEST $22, $18, 0x118
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portREG_TEST $22, $19, 0x119
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portREG_TEST $22, $20, 0x120
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portREG_TEST $22, $21, 0x121
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portREG_TEST $22, $23, 0x123
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portREG_TEST $22, $24, 0x124
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portREG_TEST $22, $25, 0x125
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portREG_TEST $22, $30, 0x130
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/* No errors detected. Increment the loop count so the check timer knows
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this task is still running without error, then loop back to do it all
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again. The address of the loop counter is in $4. */
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lw $22, 0( $4 )
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addiu $22, $22, 0x01
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sw $22, 0( $4 )
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b vRegTest1Loop
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nop
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.end vRegTest1
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.set micromips
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.set noreorder
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.set noat
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.ent vRegTest2
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vRegTest2:
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addiu $1, $0, 0x21
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addiu $2, $0, 0x22
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addiu $3, $0, 0x23
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/* $4 contains the address of the loop counter - don't mess with $4. */
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addiu $5, $0, 0x25
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addiu $6, $0, 0x26
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addiu $7, $0, 0x27
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addiu $8, $0, 0x28
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addiu $9, $0, 0x29
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addiu $10, $0, 0x210
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addiu $11, $0, 0x211
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addiu $12, $0, 0x212
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addiu $13, $0, 0x213
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addiu $14, $0, 0x214
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addiu $15, $0, 0x215
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addiu $16, $0, 0x216
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addiu $17, $0, 0x217
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addiu $18, $0, 0x218
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addiu $19, $0, 0x219
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addiu $20, $0, 0x220
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addiu $21, $0, 0x221
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addiu $23, $0, 0x223
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addiu $24, $0, 0x224
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addiu $25, $0, 0x225
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addiu $30, $0, 0x230
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addiu $22, $0, 0x231
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vRegTest2Loop:
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portREG_TEST $22, $1, 0x21
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portREG_TEST $22, $2, 0x22
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portREG_TEST $22, $3, 0x23
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portREG_TEST $22, $5, 0x25
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portREG_TEST $22, $6, 0x26
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portREG_TEST $22, $7, 0x27
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portREG_TEST $22, $8, 0x28
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portREG_TEST $22, $9, 0x29
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portREG_TEST $22, $10, 0x210
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portREG_TEST $22, $11, 0x211
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portREG_TEST $22, $12, 0x212
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portREG_TEST $22, $13, 0x213
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portREG_TEST $22, $14, 0x214
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portREG_TEST $22, $15, 0x215
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portREG_TEST $22, $16, 0x216
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portREG_TEST $22, $17, 0x217
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portREG_TEST $22, $18, 0x218
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portREG_TEST $22, $19, 0x219
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portREG_TEST $22, $20, 0x220
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portREG_TEST $22, $21, 0x221
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portREG_TEST $22, $23, 0x223
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portREG_TEST $22, $24, 0x224
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portREG_TEST $22, $25, 0x225
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portREG_TEST $22, $30, 0x230
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/* No errors detected. Increment the loop count so the check timer knows
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this task is still running without error, then loop back to do it all
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again. The address of the loop counter is in $4. */
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lw $22, 0( $4 )
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addiu $22, $22, 0x01
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sw $22, 0( $4 )
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b vRegTest2Loop
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nop
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.end vRegTest2
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