mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-19 21:11:57 -04:00
57cc3389a5
Bug fix - issue introduced in V8.2.2 when the current timer list is empty and the overflow timer list is not empty. Add PIC32MZ EF (floating point) support and update the MZ demo project to test the flop context switching. Improve efficiency of the stack overflow checking. Add CLI to RX71M demo. General tidy up of new RZ and RX projects - including ensuring the UART driver copes with 0 length strings. Add stack overflow checking to the [old] PIC24 demo.
594 lines
16 KiB
ArmAsm
594 lines
16 KiB
ArmAsm
/*
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FreeRTOS V8.2.2 - Copyright (C) 2015 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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***************************************************************************
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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***************************************************************************
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading
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the FAQ page "My application does not run, what could be wrong?". Have you
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defined configASSERT()?
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http://www.FreeRTOS.org/support - In return for receiving this top quality
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embedded software for free we request you assist our global community by
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participating in the support forum.
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http://www.FreeRTOS.org/training - Investing in training allows your team to
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be as productive as possible as early as possible. Now you can receive
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FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers
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Ltd, and the world's leading authority on the world's leading RTOS.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#include <xc.h>
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#include <sys/asm.h>
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#include "FreeRTOSConfig.h"
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.set nomips16
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.set noreorder
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.global vRegTest1
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.global vRegTest2
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/************************************************************************/
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/* Reg test macro helper. Test a register for a known value branching to
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error_loop if not correct otherwise continuing on */
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.macro portREG_TEST work_reg, test_reg, test_value
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/* Check each register maintains the value assigned to it for the lifetime
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of the task. */
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addiu \work_reg, $0, 0x00
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addiu \work_reg, \test_reg, -\test_value
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beq \work_reg, $0, 1f
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nop
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/* The register value was not that expected. Jump to the error loop so the
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cycle counter stops incrementing. */
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b error_loop
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nop
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1:
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.endm
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/************************************************************************/
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/* FPU reg test macro helper, Test an FPU register for a known value branching to
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error_loop if not correct otherwise continuing on */
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#if ( __mips_hard_float == 1) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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.macro portFPU_REG_TEST work_reg, test_reg, test_value
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/* get the lower 32 bit value from the FPU and compare to the test value */
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mfc1 \work_reg, \test_reg
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addiu \work_reg, \work_reg, -\test_value
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beq \work_reg, $0, 1f
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nop
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/* The register values was not that expected. Jump to the error loop */
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b error_loop
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nop
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1:
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.endm
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#endif
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/************************************************************************/
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.set noreorder
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.set noat
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.ent error_loop
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/* Reg test tasks call the error loop when they find an error. Sitting in the
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tight error loop prevents them incrementing their ulRegTestnCycles counter, and
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so allows the check softwate timer to know an error has been found. */
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error_loop:
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b .
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nop
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.end error_loop
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.set noreorder
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.set noat
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.ent vRegTest1
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vRegTest1:
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/* Fill the registers with known values. */
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addiu $1, $0, 0x11
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addiu $2, $0, 0x12
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addiu $3, $0, 0x13
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/* $4 contains the address of the loop counter - don't mess with $4. */
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addiu $5, $0, 0x15
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addiu $6, $0, 0x16
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addiu $7, $0, 0x17
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addiu $8, $0, 0x18
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addiu $9, $0, 0x19
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addiu $10, $0, 0x110
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addiu $11, $0, 0x111
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addiu $12, $0, 0x112
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addiu $13, $0, 0x113
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addiu $14, $0, 0x114
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addiu $15, $0, 0x115
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addiu $16, $0, 0x116
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addiu $17, $0, 0x117
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addiu $18, $0, 0x118
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addiu $19, $0, 0x119
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addiu $20, $0, 0x120
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addiu $21, $0, 0x121
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addiu $23, $0, 0x123
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addiu $24, $0, 0x124
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addiu $25, $0, 0x125
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addiu $30, $0, 0x130
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addiu $22, $0, 0x131
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mthi $22, $ac1
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addiu $22, $0, 0x132
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mtlo $22, $ac1
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addiu $22, $0, 0x133
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mthi $22, $ac2
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addiu $22, $0, 0x134
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mtlo $22, $ac2
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addiu $22, $0, 0x135
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mthi $22, $ac3
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addiu $22, $0, 0x136
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mtlo $22, $ac3
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/* Test the FPU registers if they are present on the part. */
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#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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addiu $22, $0, 0x180
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mtc1 $22, $f0
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addiu $22, $0, 0x181
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mtc1 $22, $f1
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addiu $22, $0, 0x182
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mtc1 $22, $f2
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addiu $22, $0, 0x183
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mtc1 $22, $f3
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addiu $22, $0, 0x184
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mtc1 $22, $f4
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addiu $22, $0, 0x185
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mtc1 $22, $f5
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addiu $22, $0, 0x186
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mtc1 $22, $f6
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addiu $22, $0, 0x187
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mtc1 $22, $f7
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addiu $22, $0, 0x188
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mtc1 $22, $f8
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addiu $22, $0, 0x189
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mtc1 $22, $f9
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addiu $22, $0, 0x18A
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mtc1 $22, $f10
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addiu $22, $0, 0x18B
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mtc1 $22, $f11
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addiu $22, $0, 0x18C
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mtc1 $22, $f12
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addiu $22, $0, 0x18D
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mtc1 $22, $f13
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addiu $22, $0, 0x18E
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mtc1 $22, $f14
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addiu $22, $0, 0x18F
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mtc1 $22, $f15
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addiu $22, $0, 0x190
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mtc1 $22, $f16
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addiu $22, $0, 0x191
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mtc1 $22, $f17
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addiu $22, $0, 0x192
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mtc1 $22, $f18
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addiu $22, $0, 0x193
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mtc1 $22, $f19
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addiu $22, $0, 0x194
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mtc1 $22, $f20
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addiu $22, $0, 0x195
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mtc1 $22, $f21
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addiu $22, $0, 0x196
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mtc1 $22, $f22
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addiu $22, $0, 0x197
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mtc1 $22, $f23
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addiu $22, $0, 0x198
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mtc1 $22, $f24
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addiu $22, $0, 0x199
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mtc1 $22, $f25
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addiu $22, $0, 0x19A
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mtc1 $22, $f26
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addiu $22, $0, 0x19B
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mtc1 $22, $f27
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addiu $22, $0, 0x19C
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mtc1 $22, $f28
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addiu $22, $0, 0x19D
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mtc1 $22, $f29
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addiu $22, $0, 0x19E
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mtc1 $22, $f30
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addiu $22, $0, 0x19F
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mtc1 $22, $f31
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#endif
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vRegTest1Loop:
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portREG_TEST $22, $1, 0x11
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portREG_TEST $22, $2, 0x12
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portREG_TEST $22, $3, 0x13
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/* Do not test r4 as we are using it as a loop counter */
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portREG_TEST $22, $5, 0x15
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portREG_TEST $22, $6, 0x16
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portREG_TEST $22, $7, 0x17
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portREG_TEST $22, $8, 0x18
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portREG_TEST $22, $9, 0x19
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portREG_TEST $22, $10, 0x110
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portREG_TEST $22, $11, 0x111
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portREG_TEST $22, $12, 0x112
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portREG_TEST $22, $13, 0x113
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portREG_TEST $22, $14, 0x114
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portREG_TEST $22, $15, 0x115
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portREG_TEST $22, $16, 0x116
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portREG_TEST $22, $17, 0x117
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portREG_TEST $22, $18, 0x118
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portREG_TEST $22, $19, 0x119
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portREG_TEST $22, $20, 0x120
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portREG_TEST $22, $21, 0x121
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/* Do not test r22, used as a helper */
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portREG_TEST $22, $23, 0x123
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portREG_TEST $22, $24, 0x124
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portREG_TEST $22, $25, 0x125
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portREG_TEST $22, $30, 0x130
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mfhi $22, $ac1
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addiu $22, $22, -0x131
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beq $22, $0, .+16
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nop
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b error_loop
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nop
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mflo $22, $ac1
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addiu $22, $22, -0x132
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beq $22, $0, .+16
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nop
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b error_loop
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nop
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mfhi $22, $ac2
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addiu $22, $22, -0x133
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beq $22, $0, .+16
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nop
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b error_loop
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nop
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mflo $22, $ac2
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addiu $22, $22, -0x134
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beq $22, $0, .+16
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nop
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b error_loop
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nop
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mfhi $22, $ac3
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addiu $22, $22, -0x135
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beq $22, $0, .+16
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nop
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b error_loop
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nop
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mflo $22, $ac3
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addiu $22, $22, -0x136
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beq $22, $0, .+16
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nop
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b error_loop
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nop
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/* Test the FPU registers if they are present on the part. */
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#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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portFPU_REG_TEST $22, $f0, 0x180
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portFPU_REG_TEST $22, $f1, 0x181
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portFPU_REG_TEST $22, $f2, 0x182
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portFPU_REG_TEST $22, $f3, 0x183
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portFPU_REG_TEST $22, $f4, 0x184
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portFPU_REG_TEST $22, $f5, 0x185
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portFPU_REG_TEST $22, $f6, 0x186
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portFPU_REG_TEST $22, $f7, 0x187
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portFPU_REG_TEST $22, $f8, 0x188
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portFPU_REG_TEST $22, $f9, 0x189
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portFPU_REG_TEST $22, $f10, 0x18A
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portFPU_REG_TEST $22, $f11, 0x18B
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portFPU_REG_TEST $22, $f12, 0x18C
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portFPU_REG_TEST $22, $f13, 0x18D
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portFPU_REG_TEST $22, $f14, 0x18E
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portFPU_REG_TEST $22, $f15, 0x18F
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portFPU_REG_TEST $22, $f16, 0x190
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portFPU_REG_TEST $22, $f17, 0x191
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portFPU_REG_TEST $22, $f18, 0x192
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portFPU_REG_TEST $22, $f19, 0x193
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portFPU_REG_TEST $22, $f20, 0x194
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portFPU_REG_TEST $22, $f21, 0x195
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portFPU_REG_TEST $22, $f22, 0x196
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portFPU_REG_TEST $22, $f23, 0x197
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portFPU_REG_TEST $22, $f24, 0x198
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portFPU_REG_TEST $22, $f25, 0x199
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portFPU_REG_TEST $22, $f26, 0x19A
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portFPU_REG_TEST $22, $f27, 0x19B
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portFPU_REG_TEST $22, $f28, 0x19C
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portFPU_REG_TEST $22, $f29, 0x19D
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portFPU_REG_TEST $22, $f30, 0x19E
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portFPU_REG_TEST $22, $f31, 0x19F
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#endif
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/* No errors detected. Increment the loop count so the check timer knows
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this task is still running without error, then loop back to do it all
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again. The address of the loop counter is in $4. */
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lw $22, 0( $4 )
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addiu $22, $22, 0x01
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sw $22, 0( $4 )
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b vRegTest1Loop
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nop
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.end vRegTest1
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/************************************************************************/
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.set noreorder
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.set noat
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.ent vRegTest2
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vRegTest2:
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addiu $1, $0, 0x21
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addiu $2, $0, 0x22
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addiu $3, $0, 0x23
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/* $4 contains the address of the loop counter - don't mess with $4. */
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addiu $5, $0, 0x25
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addiu $6, $0, 0x26
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addiu $7, $0, 0x27
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addiu $8, $0, 0x28
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addiu $9, $0, 0x29
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addiu $10, $0, 0x210
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addiu $11, $0, 0x211
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addiu $12, $0, 0x212
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addiu $13, $0, 0x213
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addiu $14, $0, 0x214
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addiu $15, $0, 0x215
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addiu $16, $0, 0x216
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addiu $17, $0, 0x217
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addiu $18, $0, 0x218
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addiu $19, $0, 0x219
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addiu $20, $0, 0x220
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addiu $21, $0, 0x221
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addiu $23, $0, 0x223
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addiu $24, $0, 0x224
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addiu $25, $0, 0x225
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addiu $30, $0, 0x230
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addiu $22, $0, 0x231
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mthi $22, $ac1
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addiu $22, $0, 0x232
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mtlo $22, $ac1
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addiu $22, $0, 0x233
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mthi $22, $ac2
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addiu $22, $0, 0x234
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mtlo $22, $ac2
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addiu $22, $0, 0x235
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mthi $22, $ac3
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addiu $22, $0, 0x236
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mtlo $22, $ac3
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/* Test the FPU registers if they are present on the part. */
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#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
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addiu $22, $0, 0x280
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mtc1 $22, $f0
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addiu $22, $0, 0x281
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mtc1 $22, $f1
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addiu $22, $0, 0x282
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mtc1 $22, $f2
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addiu $22, $0, 0x283
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mtc1 $22, $f3
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addiu $22, $0, 0x284
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mtc1 $22, $f4
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addiu $22, $0, 0x285
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mtc1 $22, $f5
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addiu $22, $0, 0x286
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mtc1 $22, $f6
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addiu $22, $0, 0x287
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mtc1 $22, $f7
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addiu $22, $0, 0x288
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mtc1 $22, $f8
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addiu $22, $0, 0x289
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mtc1 $22, $f9
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addiu $22, $0, 0x28A
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mtc1 $22, $f10
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addiu $22, $0, 0x28B
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mtc1 $22, $f11
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addiu $22, $0, 0x28C
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mtc1 $22, $f12
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addiu $22, $0, 0x28D
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mtc1 $22, $f13
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addiu $22, $0, 0x28E
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mtc1 $22, $f14
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addiu $22, $0, 0x28F
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mtc1 $22, $f15
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addiu $22, $0, 0x290
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mtc1 $22, $f16
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addiu $22, $0, 0x291
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mtc1 $22, $f17
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addiu $22, $0, 0x292
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mtc1 $22, $f18
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addiu $22, $0, 0x293
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mtc1 $22, $f19
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addiu $22, $0, 0x294
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mtc1 $22, $f20
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addiu $22, $0, 0x295
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mtc1 $22, $f21
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addiu $22, $0, 0x296
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mtc1 $22, $f22
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addiu $22, $0, 0x297
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mtc1 $22, $f23
|
|
addiu $22, $0, 0x298
|
|
mtc1 $22, $f24
|
|
addiu $22, $0, 0x299
|
|
mtc1 $22, $f25
|
|
addiu $22, $0, 0x29A
|
|
mtc1 $22, $f26
|
|
addiu $22, $0, 0x29B
|
|
mtc1 $22, $f27
|
|
addiu $22, $0, 0x29C
|
|
mtc1 $22, $f28
|
|
addiu $22, $0, 0x29D
|
|
mtc1 $22, $f29
|
|
addiu $22, $0, 0x29E
|
|
mtc1 $22, $f30
|
|
addiu $22, $0, 0x29F
|
|
mtc1 $22, $f31
|
|
#endif
|
|
|
|
vRegTest2Loop:
|
|
portREG_TEST $22, $1, 0x21
|
|
portREG_TEST $22, $2, 0x22
|
|
portREG_TEST $22, $3, 0x23
|
|
/* Do not test r4 as we are using it as a loop counter */
|
|
portREG_TEST $22, $5, 0x25
|
|
portREG_TEST $22, $6, 0x26
|
|
portREG_TEST $22, $7, 0x27
|
|
portREG_TEST $22, $8, 0x28
|
|
portREG_TEST $22, $9, 0x29
|
|
portREG_TEST $22, $10, 0x210
|
|
portREG_TEST $22, $11, 0x211
|
|
portREG_TEST $22, $12, 0x212
|
|
portREG_TEST $22, $13, 0x213
|
|
portREG_TEST $22, $14, 0x214
|
|
portREG_TEST $22, $15, 0x215
|
|
portREG_TEST $22, $16, 0x216
|
|
portREG_TEST $22, $17, 0x217
|
|
portREG_TEST $22, $18, 0x218
|
|
portREG_TEST $22, $19, 0x219
|
|
portREG_TEST $22, $20, 0x220
|
|
portREG_TEST $22, $21, 0x221
|
|
/* Do not test r22, used as a helper */
|
|
portREG_TEST $22, $23, 0x223
|
|
portREG_TEST $22, $24, 0x224
|
|
portREG_TEST $22, $25, 0x225
|
|
portREG_TEST $22, $30, 0x230
|
|
|
|
mfhi $22, $ac1
|
|
addiu $22, $22, -0x231
|
|
beq $22, $0, .+16
|
|
nop
|
|
b error_loop
|
|
nop
|
|
|
|
mflo $22, $ac1
|
|
addiu $22, $22, -0x232
|
|
beq $22, $0, .+16
|
|
nop
|
|
b error_loop
|
|
nop
|
|
|
|
mfhi $22, $ac2
|
|
addiu $22, $22, -0x233
|
|
beq $22, $0, .+16
|
|
nop
|
|
b error_loop
|
|
nop
|
|
|
|
mflo $22, $ac2
|
|
addiu $22, $22, -0x234
|
|
beq $22, $0, .+16
|
|
nop
|
|
b error_loop
|
|
nop
|
|
|
|
mfhi $22, $ac3
|
|
addiu $22, $22, -0x235
|
|
beq $22, $0, .+16
|
|
nop
|
|
b error_loop
|
|
nop
|
|
|
|
mflo $22, $ac3
|
|
addiu $22, $22, -0x236
|
|
beq $22, $0, .+16
|
|
nop
|
|
b error_loop
|
|
nop
|
|
|
|
/* Test the FPU registers if they are present on the part. */
|
|
#if ( __mips_hard_float == 1 ) && ( configUSE_TASK_FPU_SUPPORT == 1 )
|
|
portFPU_REG_TEST $22, $f0, 0x280
|
|
portFPU_REG_TEST $22, $f1, 0x281
|
|
portFPU_REG_TEST $22, $f2, 0x282
|
|
portFPU_REG_TEST $22, $f3, 0x283
|
|
portFPU_REG_TEST $22, $f4, 0x284
|
|
portFPU_REG_TEST $22, $f5, 0x285
|
|
portFPU_REG_TEST $22, $f6, 0x286
|
|
portFPU_REG_TEST $22, $f7, 0x287
|
|
portFPU_REG_TEST $22, $f8, 0x288
|
|
portFPU_REG_TEST $22, $f9, 0x289
|
|
portFPU_REG_TEST $22, $f10, 0x28A
|
|
portFPU_REG_TEST $22, $f11, 0x28B
|
|
portFPU_REG_TEST $22, $f12, 0x28C
|
|
portFPU_REG_TEST $22, $f13, 0x28D
|
|
portFPU_REG_TEST $22, $f14, 0x28E
|
|
portFPU_REG_TEST $22, $f15, 0x28F
|
|
portFPU_REG_TEST $22, $f16, 0x290
|
|
portFPU_REG_TEST $22, $f17, 0x291
|
|
portFPU_REG_TEST $22, $f18, 0x292
|
|
portFPU_REG_TEST $22, $f19, 0x293
|
|
portFPU_REG_TEST $22, $f20, 0x294
|
|
portFPU_REG_TEST $22, $f21, 0x295
|
|
portFPU_REG_TEST $22, $f22, 0x296
|
|
portFPU_REG_TEST $22, $f23, 0x297
|
|
portFPU_REG_TEST $22, $f24, 0x298
|
|
portFPU_REG_TEST $22, $f25, 0x299
|
|
portFPU_REG_TEST $22, $f26, 0x29A
|
|
portFPU_REG_TEST $22, $f27, 0x29B
|
|
portFPU_REG_TEST $22, $f28, 0x29C
|
|
portFPU_REG_TEST $22, $f29, 0x29D
|
|
portFPU_REG_TEST $22, $f30, 0x29E
|
|
portFPU_REG_TEST $22, $f31, 0x29F
|
|
#endif
|
|
|
|
/* No errors detected. Increment the loop count so the check timer knows
|
|
this task is still running without error, then loop back to do it all
|
|
again. The address of the loop counter is in $4. */
|
|
lw $22, 0( $4 )
|
|
addiu $22, $22, 0x01
|
|
sw $22, 0( $4 )
|
|
b vRegTest2Loop
|
|
nop
|
|
|
|
.end vRegTest2
|
|
|
|
|
|
|