mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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4629138a42
* Simple blinky demo working. Not tried full demo yet. * Get the full demo running. * Add Eclipse project to build the RISC-V_RV32_QEMU_VIRT_GCC gcc makefile. * Add regtest tasks to the RISC-V_RV32_QEMU_VIRT_GCC demo. * Update priority of the timer task. * Adjust timer frequency and optimisation level before committing prior to rearranging the Eclipse project. * Reorganise Eclipse project slightly. * Add note to the RISC-V-Qemu-virt_GCC readme file about the updated version in RISC-V_RV32_QEMU_VIRT_GCC. * Update headers in newly added source files so they pass the automated header check. * Update lexicon to pass automated spell check. Co-authored-by: none <>
54 lines
1.8 KiB
C
54 lines
1.8 KiB
C
/*
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* FreeRTOS V202112.00
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef RISCV_VIRT_H_
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#define RISCV_VIRT_H_
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#include "riscv-reg.h"
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#ifdef __ASSEMBLER__
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#define CONS(NUM, TYPE)NUM
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#else
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#define CONS(NUM, TYPE)NUM##TYPE
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#endif /* __ASSEMBLER__ */
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#define PRIM_HART 0
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#define CLINT_ADDR CONS(0x02000000, UL)
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#define CLINT_MSIP CONS(0x0000, UL)
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#define CLINT_MTIMECMP CONS(0x4000, UL)
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#define CLINT_MTIME CONS(0xbff8, UL)
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#define NS16550_ADDR CONS(0x10000000, UL)
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#ifndef __ASSEMBLER__
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int xGetCoreID( void );
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void vSendString( const char * s );
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#endif /* __ASSEMBLER__ */
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#endif /* RISCV_VIRT_H_ */
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