mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-10-15 17:27:46 -04:00
* Remove co-routine centric CORTEX_LM3S102_Rowley demos. Remove CORTEX_LM3S102_Rowley Demo2 and Demo3. Update Demo1 to no longer use coroutines. * Remove co-routines from MB91460_Softune demo * FreeRTOS_96348hs_SK16FX100PMC: Remove co-routine usage. Remove co-routine usage from FreeRTOS_96348hs_SK16FX100PMC demo. * MB96350_Softune_Dice_Kit: Remove co-routine usage Remove co-routines usage from MB96350_Softune_Dice_Kit demo * AVR_Dx_IAR: Remove co-routine usage * AVR_Dx_Atmel_Studio: Remove co-routine usage * PIC24_MPLAB: Remove autogenerated files and add to .gitignore * PIC24_MPLAB: Remove co-routine usage from demo * AVR_ATMega323_IAR: Remove co-routine usage * ColdFire_MCF52221_CodeWarrior: Remove coroutine usage * AVR_ATMega4809_MPLAB.X: Remove co-routine usage * AVR_ATMega4809_IAR: Remove co-routine usage * AVR_ATMega4809_Atmel_Studio: Remove coroutine usage * AVR_ATMega323_WinAVR: Remove coroutine usage * AVR_Dx_MPLAB.X: Remove coroutine usage * dsPIC_MPLAB: Remove coroutine usage * CORTEX_LM3S102_GCC: Remove coroutines and coroutine centric demos * CORTEX_LM3S102_GCC: Update makefile to discard unused symbols Allows fitting in the limited ram/flash for this part. * CORTEX_LM3S316_IAR: Remove coroutines * Demos: Remove references to crflash.c, crhook.c, crflash.h, crhook.h * Remove coroutine options from FreeRTOSConfig.h files * Xilinx: Remove backup file generated by revup utility * Demos: Remove Coroutine related config items and references * Format CBMC FreeRTOSConfig.h * Update URL from aws.amazon.com/freertos to github.com/FreeRTOS * Fix copyright year and license text * Fix license text in demo files * Update header check excluded path list * Add configBENCHMARK to lexicon
76 lines
2.9 KiB
C
76 lines
2.9 KiB
C
/*
|
|
* FreeRTOS V202112.00
|
|
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
|
* this software and associated documentation files (the "Software"), to deal in
|
|
* the Software without restriction, including without limitation the rights to
|
|
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
|
* the Software, and to permit persons to whom the Software is furnished to do so,
|
|
* subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in all
|
|
* copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
|
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
|
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
|
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
|
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
|
*
|
|
* https://www.FreeRTOS.org
|
|
* https://github.com/FreeRTOS
|
|
*
|
|
*/
|
|
|
|
#include "FreeRTOS.h"
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/* Called by the startup code to initialise the run time system. */
|
|
unsigned char __low_level_init(void);
|
|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
unsigned char __low_level_init(void)
|
|
{
|
|
unsigned char resetflag = RESF;
|
|
unsigned char psval = 0;
|
|
unsigned portBASE_TYPE i = 0;
|
|
|
|
/* Setup provided by NEC. */
|
|
|
|
portDISABLE_INTERRUPTS(); /* disable global interrupts */
|
|
|
|
PRCMD = 0x00; /* On-chip debug mode */
|
|
OCDM = 0x00;
|
|
VSWC = 0x00; /* set system wait control register */
|
|
WDTM2 = 0x00; /* WDT2 setting */
|
|
PLLON = 0; /* PLL stop mode */
|
|
psval = 0x0A | 0x00;
|
|
PRCMD = psval; /* set Command Register */
|
|
CKC = psval; /* set Clock Control Register */
|
|
PLLS = 0x03;
|
|
psval = 0x80; /* Set fXX and fCPU */
|
|
PRCMD = psval;
|
|
PCC = psval;
|
|
PLLON = 1; /* activate PLL */
|
|
for( i = 0; i <= 2000; i++ ) /* Wait for stabilisation */
|
|
{
|
|
portNOP();
|
|
}
|
|
while( LOCK ) /* Wait for PLL frequency stabiliasation */
|
|
{
|
|
;
|
|
}
|
|
SELPLL = 1; /* Set PLL mode active */
|
|
RSTOP = 0; /* Set fR (enable) */
|
|
BGCE0 = 0; /* Set fBRG(disable) */
|
|
psval = 0x00; /* Stand-by setting */
|
|
PRCMD = psval; /* set Command Register */
|
|
PSC = psval; /* set Power Save Control Register */
|
|
|
|
return pdTRUE;
|
|
}
|
|
/*-----------------------------------------------------------*/
|