mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-05-19 03:29:04 -04:00
117 lines
3.6 KiB
C
117 lines
3.6 KiB
C
/*****************************************************************************
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* © 2014 Microchip Technology Inc. and its subsidiaries.
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* You may use this software and any derivatives exclusively with
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* Microchip products.
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* THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS".
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* NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
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* INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
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* AND FITNESS FOR A PARTICULAR PURPOSE, OR ITS INTERACTION WITH MICROCHIP
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* PRODUCTS, COMBINATION WITH ANY OTHER PRODUCTS, OR USE IN ANY APPLICATION.
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* IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE,
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* INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
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* WHATSOEVER RELATED TO THE SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
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* BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.
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* TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL
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* CLAIMS IN ANY WAY RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF
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* FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
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* MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE
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* OF THESE TERMS.
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*****************************************************************************/
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/** @file mec14xx_jtvic.c
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*MEC14xx JTVIC
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*/
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/** @defgroup MEC14xx Peripherals JTVIC
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* @{
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*/
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#include "appcfg.h"
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#include "platform.h"
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#include "MEC14xx/mec14xx.h"
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#include "MEC14xx/mec14xx_jtvic.h"
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void jtvic_init(const JTVIC_CFG *ih_table, uint32_t disagg_bitmap, uint32_t cflags)
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{
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uint32_t d;
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uint8_t i, j, pidx;
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JTVIC_CTRL->w = (1ul << 0); // Soft-Reset
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d = 0ul;
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if ( cflags & (1ul << 0) )
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{
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d = (1ul << 8);
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}
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JTVIC_CTRL->w = d; // HW does not automatically clear Soft-Reset
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for (i = 0u; i < (MEC14xx_NUM_JTVIC_INTS); i++) {
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pidx = i << 2;
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for (j = 0u; j < 4u; j++) {
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JTVIC_PRI->REG32[pidx+j] = (uint32_t)(ih_table[i].pri[j]);
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}
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d = ih_table[i].isr_addr & ~(1ul << 0);
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if (disagg_bitmap & (1ul << i)) {
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d |= (1ul << 0); // dis-aggregate this GIRQ
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}
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JTVIC_ACTRL->REG32[i] = d;
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}
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JTVIC_GROUP_EN_SET->w = 0xFFFFFFFFul; // Enable GIRQ08 - GIRQ18 (all)
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}
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/* Clear JTVIC GIRQn source bit
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*
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*/
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void jtvic_clr_source(uint8_t girq_num, uint8_t bit_num)
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{
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if (girq_num < (MEC14xx_NUM_JTVIC_INTS))
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{
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bit_num &= 0x1Fu;
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JTVIC_GIRQ->REGS[girq_num].SOURCE = (1ul << bit_num);
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}
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}
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/* Disable GIRQn source with optional clearing of source.
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* girq_num = [0, 18], 0=GIRQ08, 1=GIRQ09, ..., 18=GIRQ26
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* bit_num = [0, 31]
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*/
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void jtvic_dis_clr_source(uint8_t girq_num, uint8_t bit_num, uint8_t clr_src)
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{
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if (girq_num < (MEC14xx_NUM_JTVIC_INTS))
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{
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bit_num &= 0x1Fu;
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JTVIC_GIRQ->REGS[girq_num].EN_CLR = (1ul << bit_num);
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if ( 0 != clr_src )
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{
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JTVIC_GIRQ->REGS[girq_num].SOURCE = (1ul << bit_num);
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}
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}
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}
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/* Enable with optional source clear before enable.
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* girq_num = [0, 18], 0=GIRQ08, 1=GIRQ09, ..., 18=GIRQ26
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* bit_num = [0, 31]
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*/
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void jtvic_en_source(uint8_t girq_num, uint8_t bit_num, uint8_t clr_src)
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{
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if (girq_num < (MEC14xx_NUM_JTVIC_INTS))
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{
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bit_num &= 0x1Fu;
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if ( 0 != clr_src )
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{
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JTVIC_GIRQ->REGS[girq_num].SOURCE = (1ul << bit_num);
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}
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JTVIC_GIRQ->REGS[girq_num].EN_SET = (1ul << bit_num);
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}
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}
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/* end mec14xx_jtvic.c */
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/** @}
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*/
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