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c280f26c1b
* Put XLEN into .o files. Makes it easier to work on voth RV32 and RV64 binaries side-by-side. * Let the debugger disable HTIF use. * Makefile now links the binary at BASE_ADDRESS I need this so I can easily generate the appropriate binaries for riscv-tests/debug. Unfortunately there doesn't seem to be any good mechanism to externally define values for lds files, so I'm running it through the C preprocessor. Co-authored-by: Joseph Julicher <jjulicher@mac.com>
106 lines
2.1 KiB
Markdown
106 lines
2.1 KiB
Markdown
# Emulating generic RISC-V 32bit machine on spike
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## Requirements
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1. GNU RISC-V toolchains (tested on Crosstool-NG)
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2. spike from https://github.com/riscv/riscv-isa-sim
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3. OpenOCD from https://github.com/riscv/riscv-openocd
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## How to build toolchain
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Clone the Crosstool-NG and build.
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```
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$ git clone https://github.com/crosstool-ng/crosstool-ng
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$ cd crosstool-ng
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$ ./bootstrap
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$ ./configure --enable-local
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$ make
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$ ./ct-ng menuconfig
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```
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For RV32 builds, change the following configs:
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```
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_ARCH_64=n
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CT_ARCH_ARCH=rv32ima
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CT_ARCH_ABI=ilp32
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CT_TARGET_CFLAGS="-mcmodel=medany"
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CT_TARGET_LDFLAGS="-mcmodel=medany"
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CT_MULTILIB=y
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CT_DEBUG_GDB=y
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```
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For RV64 builds, change the following configs:
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```
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CT_EXPERIMENTAL=y
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CT_ARCH_RISCV=y
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CT_ARCH_64=y
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CT_ARCH_ARCH=rv32ima
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CT_ARCH_ABI=ilp32
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CT_TARGET_CFLAGS="-mcmodel=medany"
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CT_TARGET_LDFLAGS="-mcmodel=medany"
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CT_MULTILIB=y
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CT_DEBUG_GDB=y
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```
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Build the GNU toolchain for RISC-V.
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```
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$ ./ct-ng build
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```
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A toolchain is installed at ~/x-tools/riscv64-unknown-elf directory.
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## How to build
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Add path of toolchain that is described above section.
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```
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$ export PATH=~/x-tools/riscv64-unknown-elf/bin:$PATH
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```
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To build, simply run `make`. If you want a debug build, pass `DEBUG=1`. If
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you want an RV64 build, pass `XLEN=64`.
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The resulting executable file is ./build/RTOSDemo32.axf or ./build/RTOSDemo64.axf.
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## How to run
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RV32:
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```
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$ spike -p1 --isa RV32IMA -m0x80000000:0x10000000 --rbb-port 9824 \
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./build/RTOSDemo32.axf
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```
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RV64:
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```
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$ spike -p1 --isa RV64IMA -m0x80000000:0x10000000 --rbb-port 9824 \
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./build/RTOSDemo64.axf
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```
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## How to debug with gdb
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Start OpenOCD in one terminal:
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```
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$ openocd -f spike-1.cfg
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```
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Start gdb in another:
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```
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$ riscv64-unknown-elf-gdb ./build/RTOSDemo.axf
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...
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(gdb) target extended-remote localhost:3333
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...
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(gdb) info threads
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```
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(As of 3/22/2021 OpenOCD's RISC-V FreeRTOS awareness is still incomplete.)
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## Description
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This demo starts separate transmit and receive threads. The transmit thread sends integers through a queue. Both threads print out what they're sending/receiving using HTIF.
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