FreeRTOS-Kernel/portable/GCC/RISC-V
Saiiijchan 439af33c52
riscv: refine vector context layout on stack (#1329)
Vector general register layout:

Before:
+--------------+  <-- High Address
|      v7      |
+--------------+
|      v6      |
+--------------+
|      ...     |
+--------------+
|      v0      |
+--------------+  <-- v0 - v7
|      v15     |
+--------------+
|      v14     |
+--------------+
|      ...     |
+--------------+
|      v8      |
+--------------+  <-- v8 - v15
|      ...     |
+--------------+
|      v24     |
+--------------+  <-- Low address

After:
+--------------+  <-- High Address
|      v31     |
+--------------+
|      v30     |
+--------------+
|      ...     |
+--------------+
|      v1      |
+--------------+
|      v0      |
+--------------+ <-- Low Address

Signed-off-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: wangfei_chen <wangfei_chen@realsil.com.cn>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2025-11-04 08:44:16 -08:00
..
chip_specific_extensions Use saved mstatus for FPU/VPU state determination (#1330) 2025-11-03 12:32:08 +05:30
chip_extensions.cmake Support configurable RISC-V chip extension (#773) 2023-10-27 11:57:52 -07:00
Documentation.url Normalize line endings and whitespace in source files 2022-11-29 15:38:47 -08:00
port.c Use UBaseType_t for ullMachineTimerCompareRegisterBase (#1258) 2025-03-17 16:41:11 +05:30
portASM.S Use saved mstatus for FPU/VPU state determination (#1330) 2025-11-03 12:32:08 +05:30
portContext.h riscv: refine vector context layout on stack (#1329) 2025-11-04 08:44:16 -08:00
portmacro.h Use Regex for Copyright Year in Header Check (#1002) 2024-02-26 09:26:42 -08:00
readme.txt Removing the old -RV32 directory name from parts of the documentation (#1196) 2024-11-20 12:08:15 +05:30

/*
 * The FreeRTOS kernel's RISC-V port is split between the the code that is
 * common across all currently supported RISC-V chips (implementations of the
 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
 *
 * + FreeRTOS\Source\portable\GCC\RISC-V\portASM.S contains the code that
 *   is common to all currently supported RISC-V chips.  There is only one
 *   portASM.S file because the same file is built for all RISC-V target chips.
 *
 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
 *   as there are multiple RISC-V chip implementations.
 *
 * !!!NOTE!!!
 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
 * compiler's!) include path.  For example, if the chip in use includes a core
 * local interrupter (CLINT) and does not include any chip specific register
 * extensions then add the path below to the assembler's include path:
 * FreeRTOS\Source\portable\GCC\RISC-V\chip_specific_extensions\RV32I_CLINT_no_extensions
 *
 */