mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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212 lines
7.9 KiB
ArmAsm
212 lines
7.9 KiB
ArmAsm
/*
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FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available on the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?". Have you defined configASSERT()? *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that is more than just the market leader, it *
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* is the industry's de facto standard. *
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* *
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* Help yourself get started quickly while simultaneously helping *
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* to support the FreeRTOS project by purchasing a FreeRTOS *
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* tutorial book, reference manual, or both: *
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* http://www.FreeRTOS.org/Documentation *
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* *
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***************************************************************************
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***************************************************************************
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* *
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* Investing in training allows your team to be as productive as *
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* possible as early as possible, lowering your overall development *
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* cost, and enabling you to bring a more robust product to market *
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* earlier than would otherwise be possible. Richard Barry is both *
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* the architect and key author of FreeRTOS, and so also the world's *
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* leading authority on what is the world's most popular real time *
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* kernel for deeply embedded MCU designs. Obtaining your training *
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* from Richard ensures your team will gain directly from his in-depth *
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* product knowledge and years of usage experience. Contact Real Time *
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* Engineers Ltd to enquire about the FreeRTOS Masterclass, presented *
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* by Richard Barry: http://www.FreeRTOS.org/contact
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* *
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***************************************************************************
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***************************************************************************
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* *
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* You are receiving this top quality software for free. Please play *
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* fair and reciprocate by reporting any suspected issues and *
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* participating in the community forum: *
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* http://www.FreeRTOS.org/support *
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* *
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* Thank you! *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate.
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Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and commercial middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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#include <FreeRTOSConfig.h>
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RSEG CODE:CODE(2)
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thumb
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EXTERN pxCurrentTCB
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EXTERN vTaskSwitchContext
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PUBLIC xPortPendSVHandler
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PUBLIC vPortSVCHandler
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PUBLIC vPortStartFirstTask
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PUBLIC vPortEnableVFP
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/*-----------------------------------------------------------*/
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xPortPendSVHandler:
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mrs r0, psp
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isb
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r2, [r3]
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/* Is the task using the FPU context? If so, push high vfp registers. */
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tst r14, #0x10
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it eq
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vstmdbeq r0!, {s16-s31}
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/* Save the core registers. */
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stmdb r0!, {r4-r11, r14}
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/* Save the new top of stack into the first member of the TCB. */
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str r0, [r2]
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stmdb sp!, {r3}
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mov r0, #configMAX_SYSCALL_INTERRUPT_PRIORITY
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msr basepri, r0
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dsb
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isb
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bl vTaskSwitchContext
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mov r0, #0
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msr basepri, r0
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ldmia sp!, {r3}
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/* The first item in pxCurrentTCB is the task top of stack. */
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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/* Is the task using the FPU context? If so, pop the high vfp registers
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too. */
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tst r14, #0x10
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it eq
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vldmiaeq r0!, {s16-s31}
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msr psp, r0
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isb
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#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata */
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#if WORKAROUND_PMU_CM001 == 1
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push { r14 }
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pop { pc }
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#endif
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#endif
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bx r14
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/*-----------------------------------------------------------*/
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vPortSVCHandler:
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/* Get the location of the current TCB. */
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ldr r3, =pxCurrentTCB
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ldr r1, [r3]
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ldr r0, [r1]
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/* Pop the core registers. */
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ldmia r0!, {r4-r11, r14}
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msr psp, r0
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isb
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mov r0, #0
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msr basepri, r0
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bx r14
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/*-----------------------------------------------------------*/
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vPortStartFirstTask
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/* Use the NVIC offset register to locate the stack. */
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ldr r0, =0xE000ED08
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ldr r0, [r0]
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ldr r0, [r0]
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/* Set the msp back to the start of the stack. */
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msr msp, r0
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/* Call SVC to start the first task. */
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cpsie i
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cpsie f
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dsb
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isb
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svc 0
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/*-----------------------------------------------------------*/
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vPortEnableVFP:
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/* The FPU enable bits are in the CPACR. */
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ldr.w r0, =0xE000ED88
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ldr r1, [r0]
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/* Enable CP10 and CP11 coprocessors, then save back. */
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orr r1, r1, #( 0xf << 20 )
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str r1, [r0]
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bx r14
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END
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