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https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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* Update version number to 11.0.1+ in task.h * Update Third Party Port version to <DEVELOPMENT BRANCH> * Update version to 11.0.1 in manifest.yml
580 lines
25 KiB
C
580 lines
25 KiB
C
/*
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* SPDX-FileCopyrightText: 2017 Amazon.com, Inc. or its affiliates
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* SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc.
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*
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* SPDX-License-Identifier: MIT
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*
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* SPDX-FileContributor: 2016-2022 Espressif Systems (Shanghai) CO LTD
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*/
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/*
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* FreeRTOS Kernel <DEVELOPMENT BRANCH>
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software. If you wish to use our Amazon
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* FreeRTOS name, please do so in a fair use way that does not cause confusion.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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* 1 tab == 4 spaces!
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*/
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/*
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* Copyright (c) 2015-2019 Cadence Design Systems, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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#ifndef __ASSEMBLER__
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#include <stdint.h>
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#include <xtensa/hal.h>
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#include <xtensa/config/core.h>
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#include <xtensa/config/system.h> /* required for XSHAL_CLIB */
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#include <xtensa/xtruntime.h>
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#include "soc/spinlock.h"
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#include "esp_timer.h" /* required for FreeRTOS run time stats */
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#include "esp_system.h"
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#include "esp_idf_version.h"
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#include "esp_heap_caps.h"
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/* TODO: Resolve build warnings generated due to this header inclusion */
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#include "hal/cpu_hal.h"
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/* TODO: These includes are not directly used in this file. They are kept into to prevent a breaking change. Remove these. */
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#include <limits.h>
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#include <xtensa/xtensa_api.h>
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#include "soc/cpu.h"
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#include "soc/soc_memory_layout.h"
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#if ( ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL( 4, 2, 0 ) )
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#include "soc/compare_set.h"
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#endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0) */
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/*#include "xtensa_context.h" */
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR int8_t
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG int32_t
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#define portSHORT int16_t
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#define portSTACK_TYPE uint8_t
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#define portBASE_TYPE int
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typedef portSTACK_TYPE StackType_t;
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typedef portBASE_TYPE BaseType_t;
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typedef unsigned portBASE_TYPE UBaseType_t;
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/*-----------------------------------------------------------*/
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/* portbenchmark */
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#include "portbenchmark.h"
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#include "sdkconfig.h"
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#include "esp_attr.h"
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/* "mux" data structure (spinlock) */
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typedef spinlock_t portMUX_TYPE; /**< Spinlock type used by FreeRTOS critical sections */
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#define portMUX_INITIALIZER_UNLOCKED SPINLOCK_INITIALIZER /**< Spinlock initializer */
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#define portMUX_FREE_VAL SPINLOCK_FREE /**< Spinlock is free. [refactor-todo] check if this is still required */
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#define portMUX_NO_TIMEOUT SPINLOCK_WAIT_FOREVER /**< When passed for 'timeout_cycles', spin forever if necessary. [refactor-todo] check if this is still required */
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#define portMUX_TRY_LOCK SPINLOCK_NO_WAIT /**< Try to acquire the spinlock a single time only. [refactor-todo] check if this is still required */
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#define portMUX_INITIALIZE( mux ) spinlock_initialize( mux ) /*< Initialize a spinlock to its unlocked state */
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#define portCRITICAL_NESTING_IN_TCB 1
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/*
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* Modifications to portENTER_CRITICAL.
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*
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* For an introduction, see "Critical Sections & Disabling Interrupts" in docs/api-guides/freertos-smp.rst
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*
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* The original portENTER_CRITICAL only disabled the ISRs. This is enough for single-CPU operation: by
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* disabling the interrupts, there is no task switch so no other tasks can meddle in the data, and because
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* interrupts are disabled, ISRs can't corrupt data structures either.
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*
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* For multiprocessing, things get a bit more hairy. First of all, disabling the interrupts doesn't stop
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* the tasks or ISRs on the other processors meddling with our CPU. For tasks, this is solved by adding
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* a spinlock to the portENTER_CRITICAL macro. A task running on the other CPU accessing the same data will
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* spinlock in the portENTER_CRITICAL code until the first CPU is done.
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*
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* For ISRs, we now also need muxes: while portENTER_CRITICAL disabling interrupts will stop ISRs on the same
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* CPU from meddling with the data, it does not stop interrupts on the other cores from interfering with the
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* data. For this, we also use a spinlock in the routines called by the ISR, but these spinlocks
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* do not disable the interrupts (because they already are).
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*
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* This all assumes that interrupts are either entirely disabled or enabled. Interrupt priority levels
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* will break this scheme.
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*
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* Remark: For the ESP32, portENTER_CRITICAL and portENTER_CRITICAL_ISR both alias vPortEnterCritical, meaning
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* that either function can be called both from ISR as well as task context. This is not standard FreeRTOS
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* behaviour; please keep this in mind if you need any compatibility with other FreeRTOS implementations.
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*/
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void vPortCPUInitializeMutex( portMUX_TYPE * mux );
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#ifdef CONFIG_FREERTOS_PORTMUX_DEBUG
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#error CONFIG_FREERTOS_PORTMUX_DEBUG not supported in Amazon FreeRTOS
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#endif
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void vTaskExitCritical();
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void vTaskEnterCritical();
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static inline void vPortConsumeSpinlockArg( int unused,
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... )
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{
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}
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/** @brief Acquire a portmux spinlock with a timeout
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*
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* @param mux Pointer to portmux to acquire.
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* @param timeout_cycles Timeout to spin, in CPU cycles. Pass portMUX_NO_TIMEOUT to wait forever,
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* portMUX_TRY_LOCK to try a single time to acquire the lock.
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*
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* @return true if mutex is successfully acquired, false on timeout.
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*/
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bool vPortCPUAcquireMutexTimeout( portMUX_TYPE * mux,
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int timeout_cycles );
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void vPortCPUReleaseMutex( portMUX_TYPE * mux );
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#define portENTER_CRITICAL( ... ) do { vTaskEnterCritical(); vPortConsumeSpinlockArg( 0, ## __VA_ARGS__ ); } while( 0 )
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#define portEXIT_CRITICAL( ... ) do { vTaskExitCritical(); vPortConsumeSpinlockArg( 0, ## __VA_ARGS__ ); } while( 0 )
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#define portENTER_CRITICAL_ISR( mux ) vPortCPUAcquireMutexTimeout( mux, portMUX_NO_TIMEOUT )
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#define portEXIT_CRITICAL_ISR( mux ) vPortCPUReleaseMutex( mux )
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#define portENTER_CRITICAL_SAFE( mux ) \
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do { \
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if( xPortInIsrContext() ) { \
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portENTER_CRITICAL_ISR( mux ); \
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} \
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else { \
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portENTER_CRITICAL( mux ); \
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} \
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} while( 0 )
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#define portEXIT_CRITICAL_SAFE( mux ) \
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do { \
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if( xPortInIsrContext() ) { \
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portEXIT_CRITICAL_ISR( mux ); \
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} \
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else { \
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portEXIT_CRITICAL( mux ); \
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} \
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} while( 0 )
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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void vPortAssertIfInISR( void );
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/* Critical section management. NW-TODO: replace XTOS_SET_INTLEVEL with more efficient version, if any? */
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/* These cannot be nested. They should be used with a lot of care and cannot be called from interrupt level. */
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/* */
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/* Only applies to one CPU. See notes above & below for reasons not to use these. */
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#define portDISABLE_INTERRUPTS() do { XTOS_SET_INTLEVEL( XCHAL_EXCM_LEVEL ); portbenchmarkINTERRUPT_DISABLE(); } while( 0 )
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#define portENABLE_INTERRUPTS() do { portbenchmarkINTERRUPT_RESTORE( 0 ); XTOS_SET_INTLEVEL( 0 ); } while( 0 )
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/* Cleaner solution allows nested interrupts disabling and restoring via local registers or stack. */
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/* They can be called from interrupts too. */
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/* WARNING: Only applies to current CPU. See notes above. */
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static inline UBaseType_t __attribute__( ( always_inline ) ) xPortSetInterruptMaskFromISR( void )
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{
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UBaseType_t prev_int_level = XTOS_SET_INTLEVEL( XCHAL_EXCM_LEVEL );
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portbenchmarkINTERRUPT_DISABLE();
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return prev_int_level;
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}
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static inline void __attribute__( ( always_inline ) ) vPortClearInterruptMaskFromISR( UBaseType_t prev_level )
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{
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portbenchmarkINTERRUPT_RESTORE( prev_level );
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XTOS_RESTORE_JUST_INTLEVEL( prev_level );
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}
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/* These FreeRTOS versions are similar to the nested versions above */
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#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( prev_level ) vPortClearInterruptMaskFromISR( prev_level )
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/*Because the ROM routines don't necessarily handle a stack in external RAM correctly, we force */
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/*the stack memory to always be internal. */
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#define portTcbMemoryCaps ( MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT )
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#define portStackMemoryCaps ( MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT )
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#define pvPortMallocTcbMem( size ) heap_caps_malloc( size, portTcbMemoryCaps )
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#define pvPortMallocStackMem( size ) heap_caps_malloc( size, portStackMemoryCaps )
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/*xTaskCreateStatic uses these functions to check incoming memory. */
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#define portVALID_TCB_MEM( ptr ) ( esp_ptr_internal( ptr ) && esp_ptr_byte_accessible( ptr ) )
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#ifdef CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
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#define portVALID_STACK_MEM( ptr ) esp_ptr_byte_accessible( ptr )
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#else
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#define portVALID_STACK_MEM( ptr ) ( esp_ptr_internal( ptr ) && esp_ptr_byte_accessible( ptr ) )
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#endif
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/*
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* Wrapper for the Xtensa compare-and-set instruction. This subroutine will atomically compare
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* *addr to 'compare'. If *addr == compare, *addr is set to *set. *set is updated with the previous
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* value of *addr (either 'compare' or some other value.)
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*
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* Warning: From the ISA docs: in some (unspecified) cases, the s32c1i instruction may return the
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* *bitwise inverse* of the old mem if the mem wasn't written. This doesn't seem to happen on the
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* ESP32 (portMUX assertions would fail).
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*/
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static inline void uxPortCompareSet( volatile uint32_t * addr,
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uint32_t compare,
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uint32_t * set )
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{
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#if ( ESP_IDF_VERSION < ESP_IDF_VERSION_VAL( 4, 2, 0 ) )
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__asm__ __volatile__ (
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"WSR %2,SCOMPARE1 \n"
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"S32C1I %0, %1, 0 \n"
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: "=r" ( *set )
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: "r" ( addr ), "r" ( compare ), "0" ( *set )
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);
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#else
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#if ( XCHAL_HAVE_S32C1I > 0 )
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__asm__ __volatile__ (
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"WSR %2,SCOMPARE1 \n"
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"S32C1I %0, %1, 0 \n"
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: "=r" ( *set )
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: "r" ( addr ), "r" ( compare ), "0" ( *set )
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);
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#else
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/* No S32C1I, so do this by disabling and re-enabling interrupts (slower) */
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uint32_t intlevel, old_value;
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__asm__ __volatile__ ( "rsil %0, " XTSTR( XCHAL_EXCM_LEVEL ) "\n"
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: "=r" ( intlevel ) );
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old_value = *addr;
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if( old_value == compare )
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{
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*addr = *set;
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}
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__asm__ __volatile__ ( "memw \n"
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"wsr %0, ps\n"
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: : "r" ( intlevel ) );
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*set = old_value;
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#endif /* if ( XCHAL_HAVE_S32C1I > 0 ) */
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#endif /* #if (ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0)) */
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}
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#if ( ESP_IDF_VERSION < ESP_IDF_VERSION_VAL( 4, 2, 0 ) )
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void uxPortCompareSetExtram( volatile uint32_t * addr,
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uint32_t compare,
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uint32_t * set );
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#else
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static inline void uxPortCompareSetExtram( volatile uint32_t * addr,
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uint32_t compare,
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uint32_t * set )
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{
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#if defined( CONFIG_SPIRAM )
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compare_and_set_extram( addr, compare, set );
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#endif
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}
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#endif /* if ( ESP_IDF_VERSION < ESP_IDF_VERSION_VAL( 4, 2, 0 ) ) */
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 4
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#define portNOP() XT_NOP()
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/*-----------------------------------------------------------*/
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/* Fine resolution time */
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#define portGET_RUN_TIME_COUNTER_VALUE() xthal_get_ccount()
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/*ccount or esp_timer are initialized elsewhere */
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#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()
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#ifdef CONFIG_FREERTOS_RUN_TIME_STATS_USING_ESP_TIMER
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/* Coarse resolution time (us) */
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#define portALT_GET_RUN_TIME_COUNTER_VALUE( x ) do { x = ( uint32_t ) esp_timer_get_time(); } while( 0 )
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#endif
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/* Kernel utilities. */
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void vPortYield( void );
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void vPortEvaluateYieldFromISR( int argc,
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... );
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void _frxt_setup_switch( void );
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/* Macro to count number of arguments of a __VA_ARGS__ used to support portYIELD_FROM_ISR with,
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* or without arguments. The macro counts only 0 or 1 arguments.
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*
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* In the future, we want to switch to C++20. We also want to become compatible with clang.
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* Hence, we provide two versions of the following macros which are using variadic arguments.
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* The first one is using the GNU extension ##__VA_ARGS__. The second one is using the C++20 feature __VA_OPT__(,).
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* This allows users to compile their code with standard C++20 enabled instead of the GNU extension.
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* Below C++20, we haven't found any good alternative to using ##__VA_ARGS__.
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*/
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#if defined( __cplusplus ) && ( __cplusplus > 201703L )
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#define portGET_ARGUMENT_COUNT( ... ) portGET_ARGUMENT_COUNT_INNER( 0 __VA_OPT__(, ) __VA_ARGS__, 1, 0 )
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#else
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#define portGET_ARGUMENT_COUNT( ... ) portGET_ARGUMENT_COUNT_INNER( 0, ## __VA_ARGS__, 1, 0 )
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#endif
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#define portGET_ARGUMENT_COUNT_INNER( zero, one, count, ... ) count
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_Static_assert( portGET_ARGUMENT_COUNT() == 0, "portGET_ARGUMENT_COUNT() result does not match for 0 arguments" );
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_Static_assert( portGET_ARGUMENT_COUNT( 1 ) == 1, "portGET_ARGUMENT_COUNT() result does not match for 1 argument" );
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#define portYIELD() vPortYield()
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/* The macro below could be used when passing a single argument, or without any argument,
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* it was developed to support both usages of portYIELD inside of an ISR. Any other usage form
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* might result in undesired behaviour
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*/
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#if defined( __cplusplus ) && ( __cplusplus > 201703L )
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#define portYIELD_FROM_ISR( ... ) vPortEvaluateYieldFromISR( portGET_ARGUMENT_COUNT( __VA_ARGS__ ) __VA_OPT__(, ) __VA_ARGS__ )
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#else
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#define portYIELD_FROM_ISR( ... ) vPortEvaluateYieldFromISR( portGET_ARGUMENT_COUNT( __VA_ARGS__ ), ## __VA_ARGS__ )
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#endif
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static inline BaseType_t xPortGetCoreID();
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/*-----------------------------------------------------------*/
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/* Task function macros as described on the FreeRTOS.org WEB site. */
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#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
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#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
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/* When coprocessors are defined, we to maintain a pointer to coprocessors area. */
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/* We currently use a hack: redefine field xMPU_SETTINGS in TCB block as a structure that can hold: */
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/* MPU wrappers, coprocessor area pointer, trace code structure, and more if needed. */
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/* The field is normally used for memory protection. FreeRTOS should create another general purpose field. */
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typedef struct
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{
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#if XCHAL_CP_NUM > 0
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volatile StackType_t * coproc_area; /* Pointer to coprocessor save area; MUST BE FIRST */
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#endif
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#if portUSING_MPU_WRAPPERS
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/* Define here mpu_settings, which is port dependent */
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int mpu_setting; /* Just a dummy example here; MPU not ported to Xtensa yet */
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#endif
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#if configUSE_TRACE_FACILITY_2
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struct
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{
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/* Cf. porttraceStamp() */
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int taskstamp; /* Stamp from inside task to see where we are */
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int taskstampcount; /* A counter usually incremented when we restart the task's loop */
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} porttrace;
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#endif
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} xMPU_SETTINGS;
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/* Main hack to use MPU_wrappers even when no MPU is defined (warning: mpu_setting should not be accessed; otherwise move this above xMPU_SETTINGS) */
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#if ( XCHAL_CP_NUM > 0 || configUSE_TRACE_FACILITY_2 ) && !portUSING_MPU_WRAPPERS /* If MPU wrappers not used, we still need to allocate coproc area */
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#undef portUSING_MPU_WRAPPERS
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#define portUSING_MPU_WRAPPERS 1 /* Enable it to allocate coproc area */
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#define MPU_WRAPPERS_H /* Override mpu_wrapper.h to disable unwanted code */
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#define PRIVILEGED_FUNCTION
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#define PRIVILEGED_DATA
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#endif
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void vApplicationSleep( TickType_t xExpectedIdleTime );
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#define portSUPPRESS_TICKS_AND_SLEEP( idleTime ) vApplicationSleep( idleTime )
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void _xt_coproc_release( volatile void * coproc_sa_base );
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/*-----------------------------------------------------------*/
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#if ( ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL( 4, 2, 0 ) )
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/* Architecture specific optimisations. */
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#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
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/* Check the configuration. */
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#if ( configMAX_PRIORITIES > 32 )
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#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32. It is very rare that a system requires more than 10 to 15 different priorities as tasks that share a priority will time slice.
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#endif
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/* Store/clear the ready priorities in a bit map. */
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#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
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#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
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|
|
/*-----------------------------------------------------------*/
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|
|
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#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31 - __builtin_clz( ( uxReadyPriorities ) ) )
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#endif /* configUSE_PORT_OPTIMISED_TASK_SELECTION */
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|
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#endif /* ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 2, 0) */
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|
|
|
/*-----------------------------------------------------------*/
|
|
|
|
/*
|
|
* Map to the memory management routines required for the port.
|
|
*
|
|
* Note that libc standard malloc/free are also available for
|
|
* non-FreeRTOS-specific code, and behave the same as
|
|
* pvPortMalloc()/vPortFree().
|
|
*/
|
|
#define pvPortMalloc heap_caps_malloc_default
|
|
#define vPortFree heap_caps_free
|
|
#define xPortGetFreeHeapSize esp_get_free_heap_size
|
|
#define xPortGetMinimumEverFreeHeapSize esp_get_minimum_free_heap_size
|
|
|
|
#if ( ESP_IDF_VERSION < ESP_IDF_VERSION_VAL( 4, 2, 0 ) )
|
|
|
|
/*
|
|
* Send an interrupt to another core in order to make the task running
|
|
* on it yield for a higher-priority task.
|
|
*/
|
|
|
|
void vPortYieldOtherCore( BaseType_t coreid ) PRIVILEGED_FUNCTION;
|
|
|
|
#endif /* ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(4, 2, 0) */
|
|
|
|
/*
|
|
* Callback to set a watchpoint on the end of the stack. Called every context switch to change the stack
|
|
* watchpoint around.
|
|
*/
|
|
void vPortSetStackWatchpoint( void * pxStackStart );
|
|
|
|
/*
|
|
* Returns true if the current core is in ISR context; low prio ISR, med prio ISR or timer tick ISR. High prio ISRs
|
|
* aren't detected here, but they normally cannot call C code, so that should not be an issue anyway.
|
|
*/
|
|
BaseType_t xPortInIsrContext();
|
|
|
|
|
|
/*
|
|
* This function will be called in High prio ISRs. Returns true if the current core was in ISR context
|
|
* before calling into high prio ISR context.
|
|
*/
|
|
BaseType_t xPortInterruptedFromISRContext();
|
|
|
|
/*
|
|
* The structures and methods of manipulating the MPU are contained within the
|
|
* port layer.
|
|
*
|
|
* Fills the xMPUSettings structure with the memory region information
|
|
* contained in xRegions.
|
|
*/
|
|
#if ( portUSING_MPU_WRAPPERS == 1 )
|
|
struct xMEMORY_REGION;
|
|
void vPortStoreTaskMPUSettings( xMPU_SETTINGS * xMPUSettings,
|
|
const struct xMEMORY_REGION * const xRegions,
|
|
StackType_t * pxBottomOfStack,
|
|
configSTACK_DEPTH_TYPE uxStackDepth ) PRIVILEGED_FUNCTION;
|
|
void vPortReleaseTaskMPUSettings( xMPU_SETTINGS * xMPUSettings );
|
|
#endif
|
|
|
|
/* Multi-core: get current core ID */
|
|
static inline BaseType_t IRAM_ATTR xPortGetCoreID()
|
|
{
|
|
return ( uint32_t ) cpu_hal_get_core_id();
|
|
}
|
|
|
|
/* Get tick rate per second */
|
|
uint32_t xPortGetTickRateHz( void );
|
|
|
|
static inline bool IRAM_ATTR xPortCanYield( void )
|
|
{
|
|
uint32_t ps_reg = 0;
|
|
|
|
/*Get the current value of PS (processor status) register */
|
|
RSR( PS, ps_reg );
|
|
|
|
/*
|
|
* intlevel = (ps_reg & 0xf);
|
|
* excm = (ps_reg >> 4) & 0x1;
|
|
* CINTLEVEL is max(excm * EXCMLEVEL, INTLEVEL), where EXCMLEVEL is 3.
|
|
* However, just return true, only intlevel is zero.
|
|
*/
|
|
|
|
return( ( ps_reg & PS_INTLEVEL_MASK ) == 0 );
|
|
}
|
|
|
|
/* porttrace */
|
|
#if configUSE_TRACE_FACILITY_2
|
|
#include "porttrace.h"
|
|
#endif
|
|
|
|
/* configASSERT_2 if requested */
|
|
#if configASSERT_2
|
|
#include <stdio.h>
|
|
void exit( int );
|
|
#define configASSERT( x ) if( !( x ) ) { porttracePrint( -1 ); printf( "\nAssertion failed in %s:%d\n", __FILE__, __LINE__ ); exit( -1 ); }
|
|
#endif
|
|
|
|
/* Barriers */
|
|
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
|
|
|
|
|
#endif // __ASSEMBLER__
|
|
|
|
/* *INDENT-OFF* */
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
/* *INDENT-ON* */
|
|
|
|
#endif /* PORTMACRO_H */
|