FreeRTOS-Kernel/portable/IAR/RISC-V
Kody Stribrny 1d59f65007
Add IAR RISC-V 32 Embedded Extension Support (#588)
Adds RV32E support to the IAR port. This is done by
reducing our register usage to the first 16 registers
only.

Influenced by changes in https://github.com/FreeRTOS/FreeRTOS-Kernel/pull/543

Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com>
Co-authored-by: Gaurav Aggarwal <aggarg@amazon.com>
2022-11-29 14:55:18 -08:00
..
chip_specific_extensions Normalize files with mixed line endings (introduced in commit 3a413d1) 2021-06-01 17:55:18 -07:00
Documentation.url Style: Make freertos.org = FreeRTOS.org and add https (#134) 2020-08-21 11:30:39 -07:00
port.c Update RISC-V IAR port to support vector mode. (#458) 2022-09-20 15:32:41 -07:00
portASM.s Add IAR RISC-V 32 Embedded Extension Support (#588) 2022-11-29 14:55:18 -08:00
portContext.h Add IAR RISC-V 32 Embedded Extension Support (#588) 2022-11-29 14:55:18 -08:00
portmacro.h Add IAR RISC-V 32 Embedded Extension Support (#588) 2022-11-29 14:55:18 -08:00
readme.txt Re-sync with upstream and stripping away none kernel related. 2020-02-10 13:45:57 -08:00

/*
 * The FreeRTOS kernel's RISC-V port is split between the the code that is
 * common across all currently supported RISC-V chips (implementations of the
 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
 *
 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
 *   is common to all currently supported RISC-V chips.  There is only one
 *   portASM.S file because the same file is built for all RISC-V target chips.
 *
 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
 *   as there are multiple RISC-V chip implementations.
 *
 * !!!NOTE!!!
 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
 * compiler's!) include path.  For example, if the chip in use includes a core
 * local interrupter (CLINT) and does not include any chip specific register
 * extensions then add the path below to the assembler's include path:
 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
 *
 */