len0rd/FreeRTOS-Kernel
1
0
Fork 0
mirror of https://github.com/FreeRTOS/FreeRTOS-Kernel.git synced 2025-04-19 21:11:57 -04:00
Code Issues Packages Projects Releases Wiki Activity
FreeRTOS-Kernel/FreeRTOS/Source/portable/GCC/RISC-V
History
Richard Barry 16639d2d63 Update to the latest atomic.h. 
Improve commenting in RISC-V GCC port.
Fix IAR RISC-V port so the first task starts with interrupts enabled.
Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced.
Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section.
Efficiency improvement:  Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked.  This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE.
2019-11-18 16:28:03 +00:00
..
chip_specific_extensions Update version number ready for next release. 2019-05-11 01:47:37 +00:00
Documentation.url sync from github to svn: documentation for RISC-V. This may be a temporary parking location. 2019-09-20 20:47:29 +00:00
port.c RISC-V port updates: The machine timer compare register can now be for any HART, and correct the sequence used to update the 64-bit machine timer compare register on 32-bit cores. 2019-09-04 15:46:45 +00:00
portASM.S Update to the latest atomic.h. 2019-11-18 16:28:03 +00:00
portmacro.h Update to the latest atomic.h. 2019-11-18 16:28:03 +00:00
readme.txt Fix bug in core_cm3.c atomic macros. 2019-02-16 01:08:38 +00:00

readme.txt 

/*
 * The FreeRTOS kernel's RISC-V port is split between the the code that is
 * common across all currently supported RISC-V chips (implementations of the
 * RISC-V ISA), and code that tailors the port to a specific RISC-V chip:
 *
 * + FreeRTOS\Source\portable\GCC\RISC-V-RV32\portASM.S contains the code that
 *   is common to all currently supported RISC-V chips.  There is only one
 *   portASM.S file because the same file is built for all RISC-V target chips.
 *
 * + Header files called freertos_risc_v_chip_specific_extensions.h contain the
 *   code that tailors the FreeRTOS kernel's RISC-V port to a specific RISC-V
 *   chip.  There are multiple freertos_risc_v_chip_specific_extensions.h files
 *   as there are multiple RISC-V chip implementations.
 *
 * !!!NOTE!!!
 * TAKE CARE TO INCLUDE THE CORRECT freertos_risc_v_chip_specific_extensions.h
 * HEADER FILE FOR THE CHIP IN USE.  This is done using the assembler's (not the
 * compiler's!) include path.  For example, if the chip in use includes a core
 * local interrupter (CLINT) and does not include any chip specific register
 * extensions then add the path below to the assembler's include path:
 * FreeRTOS\Source\portable\GCC\RISC-V-RV32\chip_specific_extensions\RV32I_CLINT_no_extensions
 *
 */