mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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989bc332b2
* Add XMOS XCore ports Some minor modifications are also made to the kernel to support the XCore compiler's automatic stack size calculation. * Update kernel to support SMP The XMOS XCore ports are also updated to support SMP. * Fix compiler warnings in xcore ports The port set and clear interrupt mask from ISR macros were removed from the ports so that the default macros found in FreeRTOS.h are used instead. The default macros do not result in warnings when they are used. * Remove inline function from timers.h Inline function converted to macro. This should now build when optimizations are off and inlining is disabled. * Fix compiler warnings in xcore ports and tasks.c * fixed documentation for ulTaskNotifyTake() and ulTaskNotifyTakeIndexed() * spelling fixes for tasks.c Co-authored-by: Michael Bruno <mikeb@xmos.com>
286 lines
10 KiB
C
286 lines
10 KiB
C
/*
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FreeRTOS V4.1.1 - Copyright (C) 2003-2006 Richard Barry.
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MCF5235 Port - Copyright (C) 2006 Christian Walter.
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License** as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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FreeRTOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with FreeRTOS; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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A special exception to the GPL can be applied should you wish to distribute
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a combined work that includes FreeRTOS, without being obliged to provide
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the source code for any proprietary components. See the licensing section
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of https://www.FreeRTOS.org for full details of how and when the exception
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can be applied.
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***************************************************************************
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***************************************************************************
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* *
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* Get the FreeRTOS eBook! See https://www.FreeRTOS.org/Documentation *
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* *
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* This is a concise, step by step, 'hands on' guide that describes both *
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* general multitasking concepts and FreeRTOS specifics. It presents and *
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* explains numerous examples that are written using the FreeRTOS API. *
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* Full source code for all the examples is provided in an accompanying *
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* .zip file. *
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* *
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***************************************************************************
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***************************************************************************
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Please ensure to read the configuration and relevant port sections of the
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online documentation.
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https://www.FreeRTOS.org - Documentation, latest information, license and
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contact details.
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https://www.highintegritysystems.com/safertos/ - A version that is
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certified for use in safety critical systems.
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https://www.highintegritysystems.com/openrtos/ - Commercial support,
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development, porting, licensing and training services.
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*/
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#include <stdlib.h>
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#include "FreeRTOS.h"
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#include "FreeRTOSConfig.h"
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#include "task.h"
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/* ------------------------ Types ----------------------------------------- */
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typedef volatile uint32_t vuint32;
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typedef volatile uint16_t vuint16;
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typedef volatile uint8_t vuint8;
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/* ------------------------ Defines --------------------------------------- */
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#define portVECTOR_TABLE __RAMVEC
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#define portVECTOR_SYSCALL ( 32 + portTRAP_YIELD )
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#define portVECTOR_TIMER ( 64 + 36 )
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#define MCF_PIT_PRESCALER 512UL
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#define MCF_PIT_TIMER_TICKS ( FSYS_2 / MCF_PIT_PRESCALER )
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#define MCF_PIT_MODULUS_REGISTER(freq) ( MCF_PIT_TIMER_TICKS / ( freq ) - 1UL)
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#define MCF_PIT_PMR0 ( *( vuint16 * )( void * )( &__IPSBAR[ 0x150002 ] ) )
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#define MCF_PIT_PCSR0 ( *( vuint16 * )( void * )( &__IPSBAR[ 0x150000 ] ) )
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#define MCF_PIT_PCSR_PRE(x) ( ( ( x ) & 0x000F ) << 8 )
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#define MCF_PIT_PCSR_EN ( 0x0001 )
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#define MCF_PIT_PCSR_RLD ( 0x0002 )
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#define MCF_PIT_PCSR_PIF ( 0x0004 )
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#define MCF_PIT_PCSR_PIE ( 0x0008 )
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#define MCF_PIT_PCSR_OVW ( 0x0010 )
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#define MCF_INTC0_ICR36 ( *( vuint8 * )( void * )( &__IPSBAR[ 0x000C64 ] ) )
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#define MCF_INTC0_IMRH ( *( vuint32 * )( void * )( &__IPSBAR[ 0x000C08 ] ) )
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#define MCF_INTC0_IMRH_INT_MASK36 ( 0x00000010 )
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#define MCF_INTC0_IMRH_MASKALL ( 0x00000001 )
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#define MCF_INTC0_ICRn_IP(x) ( ( ( x ) & 0x07 ) << 0 )
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#define MCF_INTC0_ICRn_IL(x) ( ( ( x ) & 0x07 ) << 3 )
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#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 )
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#define portINITIAL_CRITICAL_NESTING ( ( uint32_t ) 10 )
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/* ------------------------ Static variables ------------------------------ */
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volatile uint32_t ulCriticalNesting = portINITIAL_CRITICAL_NESTING;
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/* ------------------------ Static functions ------------------------------ */
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#if configUSE_PREEMPTION == 0
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static void prvPortPreemptiveTick ( void ) __attribute__ ((interrupt_handler));
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#else
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static void prvPortPreemptiveTick ( void );
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#endif
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/* ------------------------ Start implementation -------------------------- */
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StackType_t *
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pxPortInitialiseStack( StackType_t * pxTopOfStack, TaskFunction_t pxCode,
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void *pvParameters )
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{
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/* Place the parameter on the stack in the expected location. */
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*pxTopOfStack = ( StackType_t ) pvParameters;
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pxTopOfStack--;
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/* Place dummy return address on stack. Tasks should never terminate so
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* we can set this to anything. */
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*pxTopOfStack = ( StackType_t ) 0;
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pxTopOfStack--;
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/* Create a Motorola Coldfire exception stack frame. First comes the return
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* address. */
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*pxTopOfStack = ( StackType_t ) pxCode;
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pxTopOfStack--;
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/* Format, fault-status, vector number for exception stack frame. Task
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* run in supervisor mode. */
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*pxTopOfStack = 0x40002000UL | ( portVECTOR_SYSCALL + 32 ) << 18;
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pxTopOfStack--;
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/* Set the initial critical section nesting counter to zero. This value
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* is used to restore the value of ulCriticalNesting. */
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*pxTopOfStack = 0;
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*pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA6; /* A6 / FP */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA5; /* A5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA4; /* A4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA3; /* A3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA2; /* A2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA1; /* A1 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xA0; /* A0 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD7; /* D7 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD6; /* D6 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD5; /* D5 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD4; /* D4 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD3; /* D3 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD2; /* D2 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD1; /* D1 */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) 0xD0; /* D0 */
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return pxTopOfStack;
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}
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/*
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* Called by portYIELD() or taskYIELD() to manually force a context switch.
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*/
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static void
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prvPortYield( void )
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{
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asm volatile ( "move.w #0x2700, %sr\n\t" );
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#if _GCC_USES_FP == 1
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asm volatile ( "unlk %fp\n\t" );
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#endif
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/* Perform the context switch. First save the context of the current task. */
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portSAVE_CONTEXT( );
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/* Find the highest priority task that is ready to run. */
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vTaskSwitchContext( );
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/* Restore the context of the new task. */
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portRESTORE_CONTEXT( );
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}
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#if configUSE_PREEMPTION == 0
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/*
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* The ISR used for the scheduler tick depends on whether the cooperative or
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* the preemptive scheduler is being used.
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*/
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static void
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prvPortPreemptiveTick ( void )
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{
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/* The cooperative scheduler requires a normal IRQ service routine to
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* simply increment the system tick.
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*/
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xTaskIncrementTick();
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MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF;
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}
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#else
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static void
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prvPortPreemptiveTick( void )
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{
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asm volatile ( "move.w #0x2700, %sr\n\t" );
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#if _GCC_USES_FP == 1
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asm volatile ( "unlk %fp\n\t" );
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#endif
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portSAVE_CONTEXT( );
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MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIF;
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if( xTaskIncrementTick() != pdFALSE )
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{
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vTaskSwitchContext( );
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}
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portRESTORE_CONTEXT( );
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}
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#endif
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void
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vPortEnterCritical()
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{
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/* FIXME: We should store the old IPL here - How are we supposed to do
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* this.
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*/
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( void )portSET_IPL( portIPL_MAX );
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/* Now interrupts are disabled ulCriticalNesting can be accessed
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* directly. Increment ulCriticalNesting to keep a count of how many times
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* portENTER_CRITICAL() has been called. */
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ulCriticalNesting++;
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}
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void
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vPortExitCritical()
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{
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if( ulCriticalNesting > portNO_CRITICAL_NESTING )
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{
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/* Decrement the nesting count as we are leaving a critical section. */
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ulCriticalNesting--;
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/* If the nesting level has reached zero then interrupts should be
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re-enabled. */
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if( ulCriticalNesting == portNO_CRITICAL_NESTING )
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{
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( void )portSET_IPL( 0 );
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}
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}
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}
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BaseType_t
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xPortStartScheduler( void )
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{
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extern void ( *portVECTOR_TABLE[ ] ) ( );
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/* Add entry in vector table for yield system call. */
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portVECTOR_TABLE[ portVECTOR_SYSCALL ] = prvPortYield;
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/* Add entry in vector table for periodic timer. */
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portVECTOR_TABLE[ portVECTOR_TIMER ] = prvPortPreemptiveTick;
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/* Configure the timer for the system clock. */
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if ( configTICK_RATE_HZ > 0)
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{
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/* Configure prescaler */
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MCF_PIT_PCSR0 = MCF_PIT_PCSR_PRE( 0x9 ) | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_OVW;
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/* Initialize the periodic timer interrupt. */
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MCF_PIT_PMR0 = MCF_PIT_MODULUS_REGISTER( configTICK_RATE_HZ );
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/* Configure interrupt priority and level and unmask interrupt. */
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MCF_INTC0_ICR36 = MCF_INTC0_ICRn_IL( 0x1 ) | MCF_INTC0_ICRn_IP( 0x1 );
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MCF_INTC0_IMRH &= ~( MCF_INTC0_IMRH_INT_MASK36 | MCF_INTC0_IMRH_MASKALL );
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/* Enable interrupts */
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MCF_PIT_PCSR0 |= MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_EN | MCF_PIT_PCSR_PIF;
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}
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/* Restore the context of the first task that is going to run. */
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portRESTORE_CONTEXT( );
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/* Should not get here. */
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return pdTRUE;
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}
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void
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vPortEndScheduler( void )
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{
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}
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