mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
synced 2025-04-24 07:21:57 -04:00
195 lines
4.4 KiB
ArmAsm
195 lines
4.4 KiB
ArmAsm
/*
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* crt0.S
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* 1 define and initial the stack pointer
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* 2 exception handler table
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* 3 call SystemInit
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* 4 go to __main in entry.o
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*
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* Copyright (C) 2016~2017 Hangzhou C-SKY Microsystems Co., Ltd
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* Modify by Jiang Long on 2016-09-14
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*/
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// <<< Use Configuration Wizard in Context Menu >>>
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/*
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* For importing variable or functions from other c or assemble files.
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*/
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.import main
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/*
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* default service routine
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*/
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.global Reset_Handler
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.global Misaligned_Access_Handler
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.global Access_Error_Handler
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.global Divided_By_Zero_Handler
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.global Illegal_Handler
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.global Privlege_Violation_Handler
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.global Trace_Exection_Handler
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.global Breakpoint_Exception_Handler
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.global Unrecoverable_Error_Handler
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.global Idly4_Error_Handler
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.global Auto_INT_Handler
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.global Auto_FINT_Handler
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.global Reserved_HAI_Handler
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.global Reserved_FP_Handler
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.global TLB_Ins_Empty_Handler
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.global TLB_Data_Empty_Handler
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.global Default_handler
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.weak Reset_Handler
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.weak Misaligned_Access_Handler
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.weak Access_Error_Handler
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.weak Divided_By_Zero_Handler
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.weak Illegal_Handler
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.weak Privlege_Violation_Handler
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.weak Trace_Exection_Handler
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.weak Breakpoint_Exception_Handler
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.weak Unrecoverable_Error_Handler
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.weak Idly4_Error_Handler
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.weak Auto_INT_Handler
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.weak Auto_FINT_Handler
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.weak Reserved_HAI_Handler
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.weak Reserved_FP_Handler
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.weak TLB_Ins_Empty_Handler
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.weak TLB_Data_Empty_Handler
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.weak Default_handler
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.export ckcpu_vsr_table /* Vector table base address. */
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.section .exp_table,"ax",@progbits
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/* Vector table space. */
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$d:
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.align 10
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ckcpu_vsr_table:
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.long Reset_Handler
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.long Misaligned_Access_Handler
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.long Access_Error_Handler
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.long Divided_By_Zero_Handler
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.long Illegal_Handler
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.long Privlege_Violation_Handler
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.long Trace_Exection_Handler
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.long Breakpoint_Exception_Handler
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.long Unrecoverable_Error_Handler
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.long Idly4_Error_Handler
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.long Auto_INT_Handler
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.long Auto_FINT_Handler
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.long Reserved_HAI_Handler
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.long Reserved_FP_Handler
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.long TLB_Ins_Empty_Handler
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.long TLB_Data_Empty_Handler
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.rept 32
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.long NOVIC_IRQ_Default_Handler
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.endr
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$t:
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/* The ckcpu startup codes. */
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.text
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.align 2
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/*
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* This is the codes first entry point. This is where it all begins...
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*/
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Reset_Handler:
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/*
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* Init psr value, enable exception, disable interrupt and fast interrupt.
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* psr = 0x80000100
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*/
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bgeni r7, 31
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bseti r7, 30
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bseti r7, 29
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bseti r7, 8
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mtcr r7, psr
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/*
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* Setup initial vector base table for interrupts and exceptions
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*/
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lrw a3, ckcpu_vsr_table
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mtcr a3, vbr
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/* Initialize the normal stack pointer from the linker definition. */
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lrw r0, g_top_irqstack
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mov sp, r0
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/*
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* The ranges of copy from/to are specified by following symbols
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* __etext: LMA of start of the section to copy from. Usually end of text
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* __data_start__: VMA of start of the section to copy to
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* __data_end__: VMA of end of the section to copy to
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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lrw r1, __erodata
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lrw r2, __data_start__
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lrw r3, __data_end__
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subu r3, r2
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cmpnei r3, 0
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bf .L_loop0_done
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.L_loop0:
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ldw r0, (r1, 0)
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stw r0, (r2, 0)
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addi r1, 4
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addi r2, 4
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subi r3, 4
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cmpnei r3, 0
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bt .L_loop0
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.L_loop0_done:
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/*
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* The BSS section is specified by following symbols
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* __bss_start__: start of the BSS section.
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* __bss_end__: end of the BSS section.
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*
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* Both addresses must be aligned to 4 bytes boundary.
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*/
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lrw r1, __bss_start__
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lrw r2, __bss_end__
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movi r0, 0
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subu r2, r1
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cmpnei r2, 0
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bf .L_loop1_done
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.L_loop1:
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stw r0, (r1, 0)
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addi r1, 4
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subi r2, 4
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cmpnei r2, 0
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bt .L_loop1
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.L_loop1_done:
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jbsr main
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/* Should never get here. */
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1:
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br 1b
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Misaligned_Access_Handler:
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Access_Error_Handler:
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Divided_By_Zero_Handler:
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Illegal_Handler:
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Privlege_Violation_Handler:
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Trace_Exection_Handler:
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Breakpoint_Exception_Handler:
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Unrecoverable_Error_Handler:
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Idly4_Error_Handler:
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Auto_INT_Handler:
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Auto_FINT_Handler:
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Reserved_HAI_Handler:
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Reserved_FP_Handler:
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TLB_Ins_Empty_Handler:
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TLB_Data_Empty_Handler:
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Default_handler:
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br Default_handler
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rte
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.section .bss
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.align 2
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.global g_intstackalloc
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.global g_intstackbase
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.global g_top_irqstack
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g_intstackalloc:
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g_intstackbase:
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.space 4096
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g_top_irqstack: |