mirror of
https://github.com/FreeRTOS/FreeRTOS-Kernel.git
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365 lines
13 KiB
C
365 lines
13 KiB
C
/*
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FreeRTOS V8.0.1 - Copyright (C) 2014 Real Time Engineers Ltd.
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All rights reserved
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VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION.
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***************************************************************************
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* *
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* FreeRTOS provides completely free yet professionally developed, *
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* robust, strictly quality controlled, supported, and cross *
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* platform software that has become a de facto standard. *
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* *
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* Help yourself get started quickly and support the FreeRTOS *
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* project by purchasing a FreeRTOS tutorial book, reference *
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* manual, or both from: http://www.FreeRTOS.org/Documentation *
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* *
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* Thank you! *
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* *
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***************************************************************************
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This file is part of the FreeRTOS distribution.
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FreeRTOS is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License (version 2) as published by the
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Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception.
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>>! NOTE: The modification to the GPL is included to allow you to !<<
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>>! distribute a combined work that includes FreeRTOS without being !<<
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>>! obliged to provide the source code for proprietary components !<<
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>>! outside of the FreeRTOS kernel. !<<
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FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. Full license text is available from the following
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link: http://www.freertos.org/a00114.html
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1 tab == 4 spaces!
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***************************************************************************
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* *
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* Having a problem? Start by reading the FAQ "My application does *
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* not run, what could be wrong?" *
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* *
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* http://www.FreeRTOS.org/FAQHelp.html *
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* *
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***************************************************************************
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http://www.FreeRTOS.org - Documentation, books, training, latest versions,
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license and Real Time Engineers Ltd. contact details.
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http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products,
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including FreeRTOS+Trace - an indispensable productivity tool, a DOS
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compatible FAT file system, and our tiny thread aware UDP/IP stack.
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http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High
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Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS
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licenses offer ticketed support, indemnification and middleware.
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http://www.SafeRTOS.com - High Integrity Systems also provide a safety
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engineered and independently SIL3 certified version for use in safety and
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mission critical applications that require provable dependability.
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1 tab == 4 spaces!
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*/
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/*-----------------------------------------------------------
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* Implementation of functions defined in portable.h for the ARM CM0 port.
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*----------------------------------------------------------*/
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/* Scheduler includes. */
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#include "FreeRTOS.h"
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#include "task.h"
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/* Constants required to manipulate the NVIC. */
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#define portNVIC_SYSTICK_CTRL ( ( volatile uint32_t *) 0xe000e010 )
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#define portNVIC_SYSTICK_LOAD ( ( volatile uint32_t *) 0xe000e014 )
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#define portNVIC_INT_CTRL ( ( volatile uint32_t *) 0xe000ed04 )
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#define portNVIC_SYSPRI2 ( ( volatile uint32_t *) 0xe000ed20 )
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#define portNVIC_SYSTICK_CLK 0x00000004
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#define portNVIC_SYSTICK_INT 0x00000002
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#define portNVIC_SYSTICK_ENABLE 0x00000001
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#define portNVIC_PENDSVSET 0x10000000
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#define portMIN_INTERRUPT_PRIORITY ( 255UL )
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#define portNVIC_PENDSV_PRI ( portMIN_INTERRUPT_PRIORITY << 16UL )
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#define portNVIC_SYSTICK_PRI ( portMIN_INTERRUPT_PRIORITY << 24UL )
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/* Constants required to set up the initial stack. */
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#define portINITIAL_XPSR ( 0x01000000 )
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/* Let the user override the pre-loading of the initial LR with the address of
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prvTaskExitError() in case is messes up unwinding of the stack in the
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debugger. */
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#ifdef configTASK_RETURN_ADDRESS
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#define portTASK_RETURN_ADDRESS configTASK_RETURN_ADDRESS
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#else
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#define portTASK_RETURN_ADDRESS prvTaskExitError
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#endif
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
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/*
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* Setup the timer to generate the tick interrupts.
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*/
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static void prvSetupTimerInterrupt( void );
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/*
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* Exception handlers.
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*/
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void xPortPendSVHandler( void ) __attribute__ (( naked ));
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void xPortSysTickHandler( void );
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void vPortSVCHandler( void );
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/*
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* Start first task is a separate function so it can be tested in isolation.
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*/
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static void vPortStartFirstTask( void ) __attribute__ (( naked ));
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/*
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* Used to catch tasks that attempt to return from their implementing function.
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*/
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static void prvTaskExitError( void );
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters )
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{
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/* Simulate the stack frame as it would be created by a context switch
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interrupt. */
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pxTopOfStack--; /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts. */
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*pxTopOfStack = portINITIAL_XPSR; /* xPSR */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) pxCode; /* PC */
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pxTopOfStack--;
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*pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */
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pxTopOfStack -= 5; /* R12, R3, R2 and R1. */
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*pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */
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pxTopOfStack -= 8; /* R11..R4. */
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return pxTopOfStack;
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}
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/*-----------------------------------------------------------*/
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static void prvTaskExitError( void )
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{
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/* A function that implements a task must not exit or attempt to return to
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its caller as there is nothing to return to. If a task wants to exit it
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should instead call vTaskDelete( NULL ).
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Artificially force an assert() to be triggered if configASSERT() is
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defined, then stop here so application writers can catch the error. */
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configASSERT( uxCriticalNesting == ~0UL );
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portDISABLE_INTERRUPTS();
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for( ;; );
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}
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/*-----------------------------------------------------------*/
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void vPortSVCHandler( void )
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{
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/* This function is no longer used, but retained for backward
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compatibility. */
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}
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/*-----------------------------------------------------------*/
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void vPortStartFirstTask( void )
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{
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/* The MSP stack is not reset as, unlike on M3/4 parts, there is no vector
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table offset register that can be used to locate the initial stack value.
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Not all M0 parts have the application vector table at address 0. */
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__asm volatile(
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" ldr r2, pxCurrentTCBConst2 \n" /* Obtain location of pxCurrentTCB. */
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" ldr r3, [r2] \n"
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" ldr r0, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" add r0, #32 \n" /* Discard everything up to r0. */
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" msr psp, r0 \n" /* This is now the new top of stack to use in the task. */
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" movs r0, #2 \n" /* Switch to the psp stack. */
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" msr CONTROL, r0 \n"
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" pop {r0-r5} \n" /* Pop the registers that are saved automatically. */
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" mov lr, r5 \n" /* lr is now in r5. */
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" cpsie i \n" /* The first task has its context and interrupts can be enabled. */
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" pop {pc} \n" /* Finally, pop the PC to jump to the user defined task code. */
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst2: .word pxCurrentTCB "
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);
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}
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/*-----------------------------------------------------------*/
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/*
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* See header file for description.
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*/
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BaseType_t xPortStartScheduler( void )
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{
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/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
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*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
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*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
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/* Start the timer that generates the tick ISR. Interrupts are disabled
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here already. */
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prvSetupTimerInterrupt();
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/* Initialise the critical nesting count ready for the first task. */
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uxCriticalNesting = 0;
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/* Start the first task. */
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vPortStartFirstTask();
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/* Should never get here as the tasks will now be executing! Call the task
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exit error function to prevent compiler warnings about a static function
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not being called in the case that the application writer overrides this
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functionality by defining configTASK_RETURN_ADDRESS. */
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prvTaskExitError();
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/* Should not get here! */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vPortEndScheduler( void )
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{
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/* Not implemented in ports where there is nothing to return to.
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Artificially force an assert. */
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configASSERT( uxCriticalNesting == 1000UL );
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}
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/*-----------------------------------------------------------*/
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void vPortYield( void )
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{
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/* Set a PendSV to request a context switch. */
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*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
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/* Barriers are normally not required but do ensure the code is completely
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within the specified behaviour for the architecture. */
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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}
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/*-----------------------------------------------------------*/
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void vPortEnterCritical( void )
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{
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portDISABLE_INTERRUPTS();
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uxCriticalNesting++;
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__asm volatile( "dsb" );
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__asm volatile( "isb" );
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}
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/*-----------------------------------------------------------*/
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void vPortExitCritical( void )
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{
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configASSERT( uxCriticalNesting );
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uxCriticalNesting--;
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if( uxCriticalNesting == 0 )
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{
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portENABLE_INTERRUPTS();
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}
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}
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/*-----------------------------------------------------------*/
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uint32_t ulSetInterruptMaskFromISR( void )
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{
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__asm volatile(
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" mrs r0, PRIMASK \n"
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" cpsid i \n"
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" bx lr "
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);
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/* To avoid compiler warnings. This line will never be reached. */
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return 0;
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}
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/*-----------------------------------------------------------*/
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void vClearInterruptMaskFromISR( uint32_t ulMask )
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{
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__asm volatile(
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" msr PRIMASK, r0 \n"
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" bx lr "
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);
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/* Just to avoid compiler warning. */
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( void ) ulMask;
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}
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/*-----------------------------------------------------------*/
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void xPortPendSVHandler( void )
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{
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/* This is a naked function. */
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__asm volatile
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(
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" mrs r0, psp \n"
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" \n"
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" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
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" ldr r2, [r3] \n"
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" \n"
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" sub r0, r0, #32 \n" /* Make space for the remaining low registers. */
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" str r0, [r2] \n" /* Save the new top of stack. */
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" stmia r0!, {r4-r7} \n" /* Store the low registers that are not saved automatically. */
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" mov r4, r8 \n" /* Store the high registers. */
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" mov r5, r9 \n"
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" mov r6, r10 \n"
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" mov r7, r11 \n"
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" stmia r0!, {r4-r7} \n"
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" \n"
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" push {r3, r14} \n"
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" cpsid i \n"
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" bl vTaskSwitchContext \n"
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" cpsie i \n"
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" pop {r2, r3} \n" /* lr goes in r3. r2 now holds tcb pointer. */
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" \n"
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" ldr r1, [r2] \n"
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" ldr r0, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. */
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" add r0, r0, #16 \n" /* Move to the high registers. */
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" ldmia r0!, {r4-r7} \n" /* Pop the high registers. */
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" mov r8, r4 \n"
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" mov r9, r5 \n"
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" mov r10, r6 \n"
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" mov r11, r7 \n"
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" \n"
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" msr psp, r0 \n" /* Remember the new top of stack for the task. */
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" \n"
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" sub r0, r0, #32 \n" /* Go back for the low registers that are not automatically restored. */
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" ldmia r0!, {r4-r7} \n" /* Pop low registers. */
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" \n"
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" bx r3 \n"
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" \n"
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" .align 2 \n"
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"pxCurrentTCBConst: .word pxCurrentTCB "
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);
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}
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/*-----------------------------------------------------------*/
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void xPortSysTickHandler( void )
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{
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uint32_t ulPreviousMask;
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ulPreviousMask = portSET_INTERRUPT_MASK_FROM_ISR();
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{
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/* Increment the RTOS tick. */
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if( xTaskIncrementTick() != pdFALSE )
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{
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/* Pend a context switch. */
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*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
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}
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}
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portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
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}
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/*-----------------------------------------------------------*/
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/*
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* Setup the systick timer to generate the tick interrupts at the required
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* frequency.
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*/
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void prvSetupTimerInterrupt( void )
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{
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/* Configure SysTick to interrupt at the requested rate. */
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*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
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*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
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}
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/*-----------------------------------------------------------*/
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