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FreeRTOS-Kernel/portable/GCC/ARM_CA53_64_BIT
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Devaraj Ranganna 83083a8a13
aarch64: Rename ARM_CA53_64_BIT/_SRE to Arm_AARCH64/_SRE (#822) 
The Cortex-A53 ports are generic and can be used as a starting point
for other Armv8-A application processors. Therefore, rename
`ARM_CA53_64_BIT` to `Arm_AARCH64` and `ARM_CA53_64_BIT_SRE` to
`Arm_AARCH64_SRE`.

With this renaming, existing projects that use old port, should
migrate to renamed port as follows:

* `ARM_CA53_64_BIT` -> `Arm_AARCH64`
* `ARM_CA53_64_BIT_SRE` -> `Arm_AARCH64_SRE`

Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Co-authored-by: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com>
2023-10-31 10:06:39 +05:30
..
README.md aarch64: Rename ARM_CA53_64_BIT/_SRE to Arm_AARCH64/_SRE (#822) 2023-10-31 10:06:39 +05:30

README.md

ARM_CA53_64_BIT port

Initial port to support Armv8-A architecture in FreeRTOS kernel was written for Arm Cortex-A53 processor.

  • ARM_CA53_64_BIT
    • Memory mapped interace to access Arm GIC registers

This port is generic and can be used as a starting point for other Armv8-A application processors. Therefore, the port ARM_CA53_64_BIT is renamed as Arm_AARCH64. The existing projects that use old port ARM_CA53_64_BIT, should migrate to renamed port Arm_AARCH64.

NOTE

This port uses memory mapped interace to access Arm GIC registers.