Project Status (05/30/2011 - 22:14:08)
Project File: system.xmp Implementation State: Programming File Generated
Module Name: system
  • Errors:
No Errors
Product Version:EDK 13.1
  • Warnings:
151 Warnings (151 new)
 
XPS Reports [-]
Report NameGenerated ErrorsWarningsInfos
Platgen Log FileMon 30. May 22:03:50 201108 Warnings (8 new)35 Infos (35 new)
Libgen Log File    
Simgen Log File    
BitInit Log File    
System Log FileMon 30. May 22:14:06 2011   
 
XPS Synthesis Summary (estimated values) [-]
ReportGeneratedFlip Flops UsedLUTs UsedBRAMS UsedErrors
systemMon 30. May 22:04:22 201180988082260
microblaze_0_intc_wrapperMon 30. May 22:03:25 20117288 0
axi_timer_0_wrapperMon 30. May 22:03:17 2011260272 0
ethernet_lite_wrapperMon 30. May 22:03:06 201149170140
ethernet_lite_wrapper_fifo_generator_v8_1_fifo_generator_v8_1_xst_1Mon 30. May 22:02:50 20117144 0
mcb_ddr3_wrapperMon 30. May 22:01:44 2011372689 0
push_buttons_4bits_wrapperMon 30. May 22:01:21 20117285 0
leds_4bits_wrapperMon 30. May 22:01:11 20113341 0
rs232_uart_1_wrapperMon 30. May 22:01:01 201184102 0
debug_module_wrapperMon 30. May 22:00:52 2011131142 0
clock_generator_0_wrapperMon 30. May 22:00:44 2011   0
proc_sys_reset_0_wrapperMon 30. May 22:00:39 20116955 0
microblaze_0_bram_block_wrapperMon 30. May 22:00:33 2011  40
microblaze_0_d_bram_ctrl_wrapperMon 30. May 22:00:27 201126 0
microblaze_0_i_bram_ctrl_wrapperMon 30. May 22:00:22 201126 0
microblaze_0_dlmb_wrapperMon 30. May 22:00:16 201111 0
microblaze_0_ilmb_wrapperMon 30. May 22:00:11 201111 0
microblaze_0_wrapperMon 30. May 22:00:06 201123883217180
axi4lite_0_wrapperMon 30. May 21:59:15 201127201760 0
axi4_0_wrapperMon 30. May 21:58:52 20111258828 0
 
Device Utilization Summary (actual values) [-]
Slice Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Registers 5,838 54,576 10%  
    Number used as Flip Flops 5,830      
    Number used as Latches 0      
    Number used as Latch-thrus 0      
    Number used as AND/OR logics 8      
Number of Slice LUTs 6,093 27,288 22%  
    Number used as logic 5,529 27,288 20%  
        Number using O6 output only 3,953      
        Number using O5 output only 216      
        Number using O5 and O6 1,360      
        Number used as ROM 0      
    Number used as Memory 358 6,408 5%  
        Number used as Dual Port RAM 96      
            Number using O6 output only 4      
            Number using O5 output only 1      
            Number using O5 and O6 91      
        Number used as Single Port RAM 4      
            Number using O6 output only 4      
            Number using O5 output only 0      
            Number using O5 and O6 0      
        Number used as Shift Register 258      
            Number using O6 output only 157      
            Number using O5 output only 7      
            Number using O5 and O6 94      
    Number used exclusively as route-thrus 206      
        Number with same-slice register load 195      
        Number with same-slice carry load 11      
        Number with other load 0      
Number of occupied Slices 2,603 6,822 38%  
Number of LUT Flip Flop pairs used 7,539      
    Number with an unused Flip Flop 2,471 7,539 32%  
    Number with an unused LUT 1,446 7,539 19%  
    Number of fully used LUT-FF pairs 3,622 7,539 48%  
    Number of unique control sets 414      
    Number of slice register sites lost
        to control set restrictions
1,619 54,576 2%  
Number of bonded IOBs 78 296 26%  
    Number of LOCed IOBs 78 78 100%  
    IOB Flip Flops 18      
Number of RAMB16BWERs 26 116 22%  
Number of RAMB8BWERs 0 232 0%  
Number of BUFIO2/BUFIO2_2CLKs 1 32 3%  
    Number used as BUFIO2s 1      
    Number used as BUFIO2_2CLKs 0      
Number of BUFIO2FB/BUFIO2FB_2CLKs 0 32 0%  
Number of BUFG/BUFGMUXs 3 16 18%  
    Number used as BUFGs 3      
    Number used as BUFGMUX 0      
Number of DCM/DCM_CLKGENs 0 8 0%  
Number of ILOGIC2/ISERDES2s 10 376 2%  
    Number used as ILOGIC2s 10      
    Number used as ISERDES2s 0      
Number of IODELAY2/IODRP2/IODRP2_MCBs 24 376 6%  
    Number used as IODELAY2s 0      
    Number used as IODRP2s 2      
    Number used as IODRP2_MCBs 22      
Number of OLOGIC2/OSERDES2s 53 376 14%  
    Number used as OLOGIC2s 7      
    Number used as OSERDES2s 46      
Number of BSCANs 1 4 25%  
Number of BUFHs 0 256 0%  
Number of BUFPLLs 0 8 0%  
Number of BUFPLL_MCBs 1 4 25%  
Number of DSP48A1s 8 58 13%  
Number of GTPA1_DUALs 0 2 0%  
Number of ICAPs 0 1 0%  
Number of MCBs 1 2 50%  
Number of PCIE_A1s 0 1 0%  
Number of PCILOGICSEs 0 2 0%  
Number of PLL_ADVs 1 4 25%  
Number of PMVs 0 1 0%  
Number of STARTUPs 0 1 0%  
Number of SUSPEND_SYNCs 0 1 0%  
Average Fanout of Non-Clock Nets 3.78      
 
Performance Summary [-]
Final Timing Score: 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Translation ReportCurrentMon 30. May 22:05:37 2011072 Warnings (72 new)4 Infos (4 new)
Map ReportCurrentMon 30. May 22:10:43 2011026 Warnings (26 new)840 Infos (840 new)
Place and Route ReportCurrentMon 30. May 22:12:50 2011028 Warnings (28 new)3 Infos (3 new)
Post-PAR Static Timing ReportCurrentMon 30. May 22:13:20 2011003 Infos (3 new)
Bitgen ReportCurrentMon 30. May 22:14:07 2011025 Warnings (25 new)0
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk Log FileCurrentMon 30. May 22:14:08 2011

Date Generated: 05/30/2011 - 22:14:08